diff options
author | Martin Braun <martin.braun@ettus.com> | 2021-08-24 11:45:31 +0200 |
---|---|---|
committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2021-08-30 12:31:23 -0500 |
commit | 7c794c4bd384bbcae051e024086f2293457ddd65 (patch) | |
tree | d9ce770a5375144e7f149f712666b0f56aa0e556 /host/tests | |
parent | 67e6234a0546a61661799873d8651f6e4e791536 (diff) | |
download | uhd-7c794c4bd384bbcae051e024086f2293457ddd65.tar.gz uhd-7c794c4bd384bbcae051e024086f2293457ddd65.tar.bz2 uhd-7c794c4bd384bbcae051e024086f2293457ddd65.zip |
rfnoc: duc: Fix frequency range for DUC block
The tuning range of the DUC depends on the output sample rate (which is
larger), but it was using the input sample rate. This was causing a bug
where for Tx, the DSP tuning range was limited when using multi_usrp API,
and thus would not allow to DSP-tune beyond the current sampling rate.
In this patch, we also re-use the existing calculation of the sampling
rate, and harmonize that code between duc_block_control and
ddc_block_control.
Consider the following Python REPL code:
>>> import uhd
>>> U = uhd.usrp.MultiUSRP('type=x300')
>>> U.set_rx_rate(10e6)
>>> U.set_tx_rate(10e6)
>>> # Creating a streaming is required, or the input rate will not be
>>> # set:
>>> S = U.get_tx_stream(uhd.usrp.StreamArgs("fc32", "sc16"))
>>> treq = uhd.types.TuneRequest(1e9)
>>> treq.rf_freq = 1e9
>>> treq.dsp_freq = 50e6
>>> treq.dsp_freq_policy = uhd.types.TuneRequestPolicy.manual
>>> treq.rf_freq_policy = uhd.types.TuneRequestPolicy.manual
>>> tres = U.set_rx_freq(treq, 0)
>>> print(str(tres))
Tune Result:
Target RF Freq: 1000.000000 (MHz)
Actual RF Freq: 1000.000000 (MHz)
Target DSP Freq: 50.000000 (MHz)
Actual DSP Freq: 5.000000 (MHz)
>>> # Note the last two lines: The *target* DSP freq was already clipped
>>> # to 5 MHz. These lines show 50.0 MHz when this patch is applied.
This bugfix is accompanied some related changes:
- The unit test is amended to verify the behaviour
- The API documentation is amended with details on its behaviour
Diffstat (limited to 'host/tests')
-rw-r--r-- | host/tests/rfnoc_block_tests/duc_block_test.cpp | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/host/tests/rfnoc_block_tests/duc_block_test.cpp b/host/tests/rfnoc_block_tests/duc_block_test.cpp index 78e988713..6c92c9d91 100644 --- a/host/tests/rfnoc_block_tests/duc_block_test.cpp +++ b/host/tests/rfnoc_block_tests/duc_block_test.cpp @@ -34,6 +34,7 @@ BOOST_AUTO_TEST_CASE(test_duc_block) constexpr size_t num_chans = 4; constexpr noc_id_t noc_id = DUC_BLOCK; constexpr int TEST_INTERP = 20; // 2 halfbands, CIC==5 + constexpr double DEFAULT_RATE = 200e6; // Matches typical MCR of X310 auto block_container = get_mock_block(noc_id, num_chans, num_chans); auto& duc_reg_iface = block_container.reg_iface; @@ -70,14 +71,21 @@ BOOST_AUTO_TEST_CASE(test_duc_block) mock_source_term.set_edge_property<double>( "scaling", 1.0, {res_source_info::OUTPUT_EDGE, 0}); mock_source_term.set_edge_property<double>( - "samp_rate", 1.0, {res_source_info::OUTPUT_EDGE, 0}); + "samp_rate", DEFAULT_RATE / TEST_INTERP, {res_source_info::OUTPUT_EDGE, 0}); UHD_LOG_INFO("TEST", "Priming mock sink node props"); mock_sink_term.set_edge_property<std::string>( "type", "sc16", {res_source_info::INPUT_EDGE, 0}); mock_sink_term.set_edge_property<double>( "scaling", 1.0, {res_source_info::INPUT_EDGE, 0}); mock_sink_term.set_edge_property<double>( - "samp_rate", 1.0, {res_source_info::INPUT_EDGE, 0}); + "samp_rate", DEFAULT_RATE, {res_source_info::INPUT_EDGE, 0}); + +#define CHECK_OUTPUT_RATE(req_rate) \ + BOOST_REQUIRE_CLOSE(mock_sink_term.get_edge_property<double>( \ + "samp_rate", {res_source_info::INPUT_EDGE, 0}), \ + req_rate, \ + 1e-6); + UHD_LOG_INFO("TEST", "Creating graph..."); graph.connect(&mock_source_term, test_duc.get(), edge_info); @@ -85,6 +93,7 @@ BOOST_AUTO_TEST_CASE(test_duc_block) UHD_LOG_INFO("TEST", "Committing graph..."); graph.commit(); UHD_LOG_INFO("TEST", "Commit complete."); + CHECK_OUTPUT_RATE(DEFAULT_RATE); // We need to set the interpation again, because the rates will screw it // change it w.r.t. to the previous setting test_duc->set_property<int>("interp", TEST_INTERP, 0); @@ -94,6 +103,8 @@ BOOST_AUTO_TEST_CASE(test_duc_block) * TEST_INTERP == mock_sink_term.get_edge_property<double>( "samp_rate", {res_source_info::INPUT_EDGE, 0})); + // Output rate should remain unchanged + CHECK_OUTPUT_RATE(DEFAULT_RATE); const double initial_input_scaling = mock_source_term.get_edge_property<double>( "scaling", {res_source_info::OUTPUT_EDGE, 0}); const double initial_output_scaling = mock_sink_term.get_edge_property<double>( @@ -122,25 +133,28 @@ BOOST_AUTO_TEST_CASE(test_duc_block) "scaling", {res_source_info::OUTPUT_EDGE, 0}); BOOST_CHECK_EQUAL(doubled_input_scaling, 2 * initial_input_scaling); - UHD_LOG_INFO("TEST", "Setting freq to 1/8 of input rate"); - constexpr double TEST_FREQ = 1.0 / 8; + BOOST_CHECK_CLOSE(test_duc->get_frequency_range(0).start(), -DEFAULT_RATE / 2, 1e-6); + BOOST_CHECK_CLOSE(test_duc->get_frequency_range(0).stop(), DEFAULT_RATE / 2, 1e-6); + UHD_LOG_INFO("TEST", + "Setting freq to 1/8 of input rate (to " << (DEFAULT_RATE / 8) / 1e6 << " MHz)"); + constexpr double TEST_FREQ = DEFAULT_RATE / 8; test_duc->set_property<double>("freq", TEST_FREQ, 0); const uint32_t freq_word_1 = duc_reg_iface->write_memory.at(duc_block_control::SR_FREQ_ADDR); BOOST_REQUIRE(freq_word_1 != 0); - UHD_LOG_INFO("TEST", "Doubling input rate (to 2.0)"); + UHD_LOG_INFO( + "TEST", "Doubling input rate (to " << (DEFAULT_RATE / 4) / 1e6 << " MHz)"); // Now this should change the freq word, but not the absolute frequency mock_sink_term.set_edge_property<double>("samp_rate", 2 * mock_sink_term.get_edge_property<double>( - "samp_rate", {res_source_info::INPUT_EDGE, 0}), + "samp_rate", {res_source_info::INPUT_EDGE, 0}), {res_source_info::INPUT_EDGE, 0}); const double freq_word_2 = duc_reg_iface->write_memory.at(duc_block_control::SR_FREQ_ADDR); // The frequency word is the phase increment, which will halve. We skirt // around fixpoint/floating point accuracy issues by using CLOSE. BOOST_CHECK_CLOSE(double(freq_word_1) / double(freq_word_2), 2.0, 1e-6); - // Reset the interpolation test_duc->set_property<int>("interp", TEST_INTERP, 0); BOOST_REQUIRE_EQUAL(test_duc->get_property<int>("interp", 0), TEST_INTERP); |