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author | Paul Butler <Paul.Butler@ni.com> | 2019-10-04 09:17:52 -0500 |
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committer | Martin Braun <martin.braun@ettus.com> | 2019-11-26 12:21:32 -0800 |
commit | cfd5cd326df722a758abb61e91667d6568fb2a14 (patch) | |
tree | c8d9d8322f2c32864cb6e9ec601f7dcd448777ac /host/tests/rx_streamer_test.cpp | |
parent | f773cf9fb96e25d064f43cffdc893ac905d91f15 (diff) | |
download | uhd-cfd5cd326df722a758abb61e91667d6568fb2a14.tar.gz uhd-cfd5cd326df722a758abb61e91667d6568fb2a14.tar.bz2 uhd-cfd5cd326df722a758abb61e91667d6568fb2a14.zip |
rfnoc: rename block clocks to ce_clk
Renaming the CE clock in the RFNoC block YAML files so that the name
is consistent across blocks. Corresponding `fpga` changes can be found
in `rfnoc: rename block clocks to ce_clk`.
Diffstat (limited to 'host/tests/rx_streamer_test.cpp')
0 files changed, 0 insertions, 0 deletions