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authorJosh Blum <josh@joshknows.com>2012-11-06 16:52:22 -0800
committerJosh Blum <josh@joshknows.com>2012-11-06 16:52:22 -0800
commit79a26e96676d7260f492728ba61b237a402df926 (patch)
tree00c19219acd912af0b38e16e77e08411965e55f4 /host/lib
parent49193c85883cc773331033a149e82dd84360a0a6 (diff)
parent43955f18215fe582b786b9ac3d1b3b195d053ab3 (diff)
downloaduhd-79a26e96676d7260f492728ba61b237a402df926.tar.gz
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Merge branch 'maint'
Diffstat (limited to 'host/lib')
-rwxr-xr-xhost/lib/ic_reg_maps/gen_adf4351_regs.py20
-rw-r--r--host/lib/usrp/dboard/db_wbx_version4.cpp55
2 files changed, 42 insertions, 33 deletions
diff --git a/host/lib/ic_reg_maps/gen_adf4351_regs.py b/host/lib/ic_reg_maps/gen_adf4351_regs.py
index 607b2979d..4b0ef788c 100755
--- a/host/lib/ic_reg_maps/gen_adf4351_regs.py
+++ b/host/lib/ic_reg_maps/gen_adf4351_regs.py
@@ -57,7 +57,7 @@ low_noise_and_spur 2[29:30] 3 low_noise, reserved0, reserved1, low
## address 3
########################################################################
clock_divider_12_bit 3[3:14] 0
-clock_div_mode 3[15:16] 0 clock_divider_off, fast_lock, resync_enable, reserved
+clock_div_mode 3[15:16] 1 clock_divider_off, fast_lock, resync_enable, reserved
##reserved 3[17] 0
cycle_slip_reduction 3[18] 0 disabled, enabled
##reserved 3[19:20] 0
@@ -76,7 +76,7 @@ aux_output_select 4[9] 1 divided, fundamental
mute_till_lock_detect 4[10] 0 mute_disabled, mute_enabled
vco_power_down 4[11] 0 vco_powered_up, vco_powered_down
band_select_clock_div 4[12:19] 0
-rf_divider_select 4[20:22] 5 div1, div2, div4, div8, div16, div32, div64
+rf_divider_select 4[20:22] 0 div1, div2, div4, div8, div16, div32, div64
feedback_select 4[23] 1 divided, fundamental
##reserved 4[24:31] 0
########################################################################
@@ -103,9 +103,9 @@ enum addr_t{
};
boost::uint32_t get_reg(boost::uint8_t addr){
- boost::uint32_t reg = 0;
+ boost::uint32_t reg = addr & 0x7;
switch(addr){
- #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs)))
+ #for $addr in range(5+1)
case $addr:
#for $reg in filter(lambda r: r.get_addr() == addr, $regs)
reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift();
@@ -115,18 +115,6 @@ boost::uint32_t get_reg(boost::uint8_t addr){
}
return reg;
}
-
-void set_reg(boost::uint8_t addr, boost::uint32_t reg){
- switch(addr){
- #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs)))
- case $addr:
- #for $reg in filter(lambda r: r.get_addr() == addr, $regs)
- $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask());
- #end for
- break;
- #end for
- }
-}
"""
if __name__ == '__main__':
diff --git a/host/lib/usrp/dboard/db_wbx_version4.cpp b/host/lib/usrp/dboard/db_wbx_version4.cpp
index 58a5e5f3e..17b910de4 100644
--- a/host/lib/usrp/dboard/db_wbx_version4.cpp
+++ b/host/lib/usrp/dboard/db_wbx_version4.cpp
@@ -41,7 +41,7 @@ static const uhd::dict<std::string, gain_range_t> wbx_v4_tx_gain_ranges = map_li
("PGA0", gain_range_t(0, 31, 1.0))
;
-static const freq_range_t wbx_v4_freq_range(50.0e6, 2.2e9);
+static const freq_range_t wbx_v4_freq_range(35.0e6, 2.2e9);
/***********************************************************************
@@ -115,22 +115,43 @@ wbx_base::wbx_version4::wbx_version4(wbx_base *_self_wbx_base) {
int v4_tx_mod = ADF4351_PDBRF;
//set the gpio directions and atr controls
- self_base->get_iface()->set_pin_ctrl(dboard_iface::UNIT_TX, v4_tx_mod|v4_iobits);
- self_base->get_iface()->set_pin_ctrl(dboard_iface::UNIT_RX, RXBB_PDB|ADF4351_PDBRF);
- self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_TX, TX_PUP_5V|TX_PUP_3V|v4_tx_mod|v4_iobits);
- self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, RX_PUP_5V|RX_PUP_3V|ADF4351_CE|RXBB_PDB|ADF4351_PDBRF|RX_ATTN_MASK);
-
- //setup ATR for the mixer enables (always enabled to prevent phase slip between bursts)
- //set TX gain iobits to min gain (max attenuation) when RX_ONLY or IDLE to suppress LO leakage
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE, v4_tx_mod, TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY, v4_tx_mod, TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY, v4_tx_mod, TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, v4_tx_mod, TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
-
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
+ self_base->get_iface()->set_pin_ctrl(dboard_iface::UNIT_TX, \
+ v4_tx_mod|v4_iobits);
+ self_base->get_iface()->set_pin_ctrl(dboard_iface::UNIT_RX, \
+ RXBB_PDB|ADF4351_PDBRF);
+ self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_TX, \
+ TX_PUP_5V|TX_PUP_3V|v4_tx_mod|v4_iobits);
+ self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, \
+ RX_PUP_5V|RX_PUP_3V|ADF4351_CE|RXBB_PDB|ADF4351_PDBRF|RX_ATTN_MASK);
+
+ //setup ATR for the mixer enables (always enabled to prevent phase slip
+ //between bursts) set TX gain iobits to min gain (max attenuation) when
+ //RX_ONLY or IDLE to suppress LO leakage
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \
+ dboard_iface::ATR_REG_IDLE, v4_tx_mod, \
+ TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \
+ dboard_iface::ATR_REG_RX_ONLY, v4_tx_mod, \
+ TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \
+ dboard_iface::ATR_REG_TX_ONLY, v4_tx_mod, \
+ TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \
+ dboard_iface::ATR_REG_FULL_DUPLEX, v4_tx_mod, \
+ TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
+
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \
+ dboard_iface::ATR_REG_IDLE, \
+ RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \
+ dboard_iface::ATR_REG_TX_ONLY, \
+ RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \
+ dboard_iface::ATR_REG_RX_ONLY, \
+ RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \
+ dboard_iface::ATR_REG_FULL_DUPLEX, \
+ RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
}
wbx_base::wbx_version4::~wbx_version4(void){