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author | Michael West <michael.west@ettus.com> | 2019-02-14 10:03:13 -0800 |
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committer | michael-west <michael.west@ettus.com> | 2019-02-18 11:25:15 -0800 |
commit | 655b9b0f8e8f8556d434404da51aaccd124bbc3a (patch) | |
tree | 5f4df51cafb837102ca76d0f7bd6a5f01be2be9c /host/lib | |
parent | f9f7b34d546a79bec55cf9d0e48ef3876f0f67d7 (diff) | |
download | uhd-655b9b0f8e8f8556d434404da51aaccd124bbc3a.tar.gz uhd-655b9b0f8e8f8556d434404da51aaccd124bbc3a.tar.bz2 uhd-655b9b0f8e8f8556d434404da51aaccd124bbc3a.zip |
RFNoC: Fix flush in source_block_ctrl_base
The configure_flow_control_out function was set to dump any packets
onto the crossbar, which could cause issues on the crossbar and in
downstream blocks. Replacing wil a call to the _flush() function in
the block_ctrl_base parent class, which drops the packets so they do
not get put onto the crossbar.
Signed-off-by: Michael West <michael.west@ettus.com>
Diffstat (limited to 'host/lib')
-rw-r--r-- | host/lib/rfnoc/source_block_ctrl_base.cpp | 19 |
1 files changed, 1 insertions, 18 deletions
diff --git a/host/lib/rfnoc/source_block_ctrl_base.cpp b/host/lib/rfnoc/source_block_ctrl_base.cpp index 656ab26af..994d66380 100644 --- a/host/lib/rfnoc/source_block_ctrl_base.cpp +++ b/host/lib/rfnoc/source_block_ctrl_base.cpp @@ -102,24 +102,7 @@ void source_block_ctrl_base::configure_flow_control_out(const bool enable_fc_out % buf_size_bytes % unique_id())); } - // Disable flow control entirely and let all upstream data flush out - // We need to do this every time the window is changed because - // a) We don't know what state the flow-control module was left in - // in the previous run (it should still be enabled) - // b) Changing the window size where data is buffered upstream may - // result in stale packets entering the stream. - sr_write(SR_FLOW_CTRL_EN, 0, block_port); - - // Wait for data to flush out. - // In the FPGA we are guaranteed that all buffered packets are more-or-less - // consecutive. 1ms@200MHz = 200,000 cycles of "flush time". 200k cycles = 200k * 8 - // bytes (64 bits) = 1.6MB of data that can be flushed. Typically in the FPGA we have - // buffering in the order of kilobytes so waiting for 1MB to flush is more than enough - // time. - // TODO: Enhancement. We should get feedback from the FPGA about when the - // source_flow_control - // module is done flushing. - std::this_thread::sleep_for(std::chrono::milliseconds(1)); + _flush(block_port); // Enable source flow control module and conditionally enable byte based and/or packet // count based flow control |