e100: moved e100 into property tree, probes ok...

13 files changed, 838 insertions, 372 deletions

diff --git a/host/lib/usrp/CMakeLists.txt b/host/lib/usrp/CMakeLists.txt
index 8ea7c2fe0..e29367e67 100644
--- a/host/lib/usrp/CMakeLists.txt
+++ b/host/lib/usrp/CMakeLists.txt
@@ -36,4 +36,4 @@ INCLUDE_SUBDIRECTORY(fx2)
 #INCLUDE_SUBDIRECTORY(usrp1)
 INCLUDE_SUBDIRECTORY(usrp2)
 INCLUDE_SUBDIRECTORY(b100)
-#INCLUDE_SUBDIRECTORY(e100)
+INCLUDE_SUBDIRECTORY(e100)
diff --git a/host/lib/usrp/e100/CMakeLists.txt b/host/lib/usrp/e100/CMakeLists.txt
index 15133ad5e..ac9d8c655 100644
--- a/host/lib/usrp/e100/CMakeLists.txt
+++ b/host/lib/usrp/e100/CMakeLists.txt
@@ -22,28 +22,19 @@
 ########################################################################
 # Conditionally configure the USRP-E100 support
 ########################################################################
-LIBUHD_REGISTER_COMPONENT("USRP-E100" ENABLE_E100 OFF "ENABLE_LIBUHD;LINUX" OFF)
+LIBUHD_REGISTER_COMPONENT("E100" ENABLE_E100 OFF "ENABLE_LIBUHD;LINUX" OFF)
 
 IF(ENABLE_E100)
     INCLUDE_DIRECTORIES(${CMAKE_CURRENT_SOURCE_DIR}/include)
 
     LIBUHD_APPEND_SOURCES(
         ${CMAKE_CURRENT_SOURCE_DIR}/clock_ctrl.cpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/clock_ctrl.hpp
         ${CMAKE_CURRENT_SOURCE_DIR}/codec_ctrl.cpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/codec_ctrl.hpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/codec_impl.cpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/dboard_impl.cpp
         ${CMAKE_CURRENT_SOURCE_DIR}/dboard_iface.cpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/dsp_impl.cpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/fpga_downloader.cpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/io_impl.cpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/mboard_impl.cpp
+        ${CMAKE_CURRENT_SOURCE_DIR}/e100_ctrl.cpp
         ${CMAKE_CURRENT_SOURCE_DIR}/e100_impl.cpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/e100_impl.hpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/e100_iface.cpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/e100_iface.hpp
         ${CMAKE_CURRENT_SOURCE_DIR}/e100_mmap_zero_copy.cpp
-        ${CMAKE_CURRENT_SOURCE_DIR}/e100_regs.hpp
+        ${CMAKE_CURRENT_SOURCE_DIR}/fpga_downloader.cpp
+        ${CMAKE_CURRENT_SOURCE_DIR}/io_impl.cpp
     )
 ENDIF(ENABLE_E100)
diff --git a/host/lib/usrp/e100/clock_ctrl.cpp b/host/lib/usrp/e100/clock_ctrl.cpp
index ff64d9ca7..6acb13528 100644
--- a/host/lib/usrp/e100/clock_ctrl.cpp
+++ b/host/lib/usrp/e100/clock_ctrl.cpp
@@ -167,7 +167,7 @@ static clock_settings_type get_clock_settings(double rate){
  **********************************************************************/
 class e100_clock_ctrl_impl : public e100_clock_ctrl{
 public:
-    e100_clock_ctrl_impl(e100_iface::sptr iface, double master_clock_rate){
+    e100_clock_ctrl_impl(spi_iface::sptr iface, double master_clock_rate){
         _iface = iface;
         _chan_rate = 0.0;
         _out_rate = 0.0;
@@ -294,10 +294,8 @@ public:
         if (_out_rate == rate) return;
         if (rate == 61.44e6) set_clock_settings_with_external_vcxo(rate);
         else                 set_clock_settings_with_internal_vco(rate);
-        //clock rate changed! update dboard clocks and FPGA ticks per second
         set_rx_dboard_clock_rate(rate);
         set_tx_dboard_clock_rate(rate);
-        _iface->poke32(E100_REG_TIME64_TPS, boost::uint32_t(get_fpga_clock_rate()));
     }
 
     double get_fpga_clock_rate(void){
@@ -421,7 +419,7 @@ public:
     }
 
 private:
-    e100_iface::sptr _iface;
+    spi_iface::sptr _iface;
     ad9522_regs_t _ad9522_regs;
     double _out_rate; //rate at the fpga and codec
     double _chan_rate; //rate before final dividers
@@ -507,6 +505,6 @@ private:
 /***********************************************************************
  * Clock Control Make
  **********************************************************************/
-e100_clock_ctrl::sptr e100_clock_ctrl::make(e100_iface::sptr iface, double master_clock_rate){
+e100_clock_ctrl::sptr e100_clock_ctrl::make(spi_iface::sptr iface, double master_clock_rate){
     return sptr(new e100_clock_ctrl_impl(iface, master_clock_rate));
 }
diff --git a/host/lib/usrp/e100/clock_ctrl.hpp b/host/lib/usrp/e100/clock_ctrl.hpp
index f3a6de0fa..7c16649d3 100644
--- a/host/lib/usrp/e100/clock_ctrl.hpp
+++ b/host/lib/usrp/e100/clock_ctrl.hpp
@@ -18,7 +18,7 @@
 #ifndef INCLUDED_USRP_E100_CLOCK_CTRL_HPP
 #define INCLUDED_USRP_E100_CLOCK_CTRL_HPP
 
-#include "e100_iface.hpp"
+#include <uhd/types/serial.hpp>
 #include <boost/shared_ptr.hpp>
 #include <boost/utility.hpp>
 #include <vector>
@@ -34,11 +34,11 @@ public:
 
     /*!
      * Make a new clock control object.
-     * \param iface the usrp_e100 iface object
+     * \param iface the spi iface object
      * \param master clock rate the FPGA rate
      * \return the clock control object
      */
-    static sptr make(e100_iface::sptr iface, double master_clock_rate);
+    static sptr make(uhd::spi_iface::sptr iface, double master_clock_rate);
 
     /*!
      * Set the rate of the fpga clock line.
diff --git a/host/lib/usrp/e100/codec_ctrl.cpp b/host/lib/usrp/e100/codec_ctrl.cpp
index a796d5cc5..6efeb10e8 100644
--- a/host/lib/usrp/e100/codec_ctrl.cpp
+++ b/host/lib/usrp/e100/codec_ctrl.cpp
@@ -38,7 +38,7 @@ const gain_range_t e100_codec_ctrl::rx_pga_gain_range(0, 20, 1);
 class e100_codec_ctrl_impl : public e100_codec_ctrl{
 public:
     //structors
-    e100_codec_ctrl_impl(e100_iface::sptr iface);
+    e100_codec_ctrl_impl(spi_iface::sptr iface);
     ~e100_codec_ctrl_impl(void);
 
     //aux adc and dac control
@@ -52,7 +52,7 @@ public:
     double get_rx_pga_gain(char);
 
 private:
-    e100_iface::sptr _iface;
+    spi_iface::sptr _iface;
     ad9862_regs_t _ad9862_regs;
     void send_reg(boost::uint8_t addr);
     void recv_reg(boost::uint8_t addr);
@@ -61,7 +61,7 @@ private:
 /***********************************************************************
  * Codec Control Structors
  **********************************************************************/
-e100_codec_ctrl_impl::e100_codec_ctrl_impl(e100_iface::sptr iface){
+e100_codec_ctrl_impl::e100_codec_ctrl_impl(spi_iface::sptr iface){
     _iface = iface;
 
     //soft reset
@@ -275,6 +275,6 @@ void e100_codec_ctrl_impl::recv_reg(boost::uint8_t addr){
 /***********************************************************************
  * Codec Control Make
  **********************************************************************/
-e100_codec_ctrl::sptr e100_codec_ctrl::make(e100_iface::sptr iface){
+e100_codec_ctrl::sptr e100_codec_ctrl::make(spi_iface::sptr iface){
     return sptr(new e100_codec_ctrl_impl(iface));
 }
diff --git a/host/lib/usrp/e100/codec_ctrl.hpp b/host/lib/usrp/e100/codec_ctrl.hpp
index 22d0390f5..707f6f521 100644
--- a/host/lib/usrp/e100/codec_ctrl.hpp
+++ b/host/lib/usrp/e100/codec_ctrl.hpp
@@ -18,7 +18,7 @@
 #ifndef INCLUDED_USRP_E100_CODEC_CTRL_HPP
 #define INCLUDED_USRP_E100_CODEC_CTRL_HPP
 
-#include "e100_iface.hpp"
+#include <uhd/types/serial.hpp>
 #include <uhd/types/ranges.hpp>
 #include <boost/shared_ptr.hpp>
 #include <boost/utility.hpp>
@@ -37,10 +37,10 @@ public:
 
     /*!
      * Make a new codec control object.
-     * \param iface the usrp_e100 iface object
+     * \param iface the spi iface object
      * \return the codec control object
      */
-    static sptr make(e100_iface::sptr iface);
+    static sptr make(uhd::spi_iface::sptr iface);
 
     //! aux adc identifier constants
     enum aux_adc_t{
diff --git a/host/lib/usrp/e100/dboard_iface.cpp b/host/lib/usrp/e100/dboard_iface.cpp
index 43e05aa57..d45577bd9 100644
--- a/host/lib/usrp/e100/dboard_iface.cpp
+++ b/host/lib/usrp/e100/dboard_iface.cpp
@@ -15,7 +15,8 @@
 // along with this program.  If not, see <http://www.gnu.org/licenses/>.
 //
 
-#include "e100_iface.hpp"
+#include "wb_iface.hpp"
+#include <uhd/types/serial.hpp>
 #include "e100_regs.hpp"
 #include "clock_ctrl.hpp"
 #include "codec_ctrl.hpp"
@@ -29,15 +30,19 @@ using namespace uhd;
 using namespace uhd::usrp;
 using namespace boost::assign;
 
-class usrp_e100_dboard_iface : public dboard_iface{
+class e100_dboard_iface : public dboard_iface{
 public:
 
-    usrp_e100_dboard_iface(
-        e100_iface::sptr iface,
+    e100_dboard_iface(
+        wb_iface::sptr wb_iface,
+        i2c_iface::sptr i2c_iface,
+        spi_iface::sptr spi_iface,
         e100_clock_ctrl::sptr clock,
         e100_codec_ctrl::sptr codec
     ){
-        _iface = iface;
+        _wb_iface = wb_iface;
+        _i2c_iface = i2c_iface;
+        _spi_iface = spi_iface;
         _clock = clock;
         _codec = codec;
 
@@ -45,11 +50,11 @@ public:
         this->set_clock_rate(UNIT_RX, _clock->get_fpga_clock_rate());
         this->set_clock_rate(UNIT_TX, _clock->get_fpga_clock_rate());
 
-        _iface->poke16(E100_REG_GPIO_RX_DBG, 0);
-        _iface->poke16(E100_REG_GPIO_TX_DBG, 0);
+        _wb_iface->poke16(E100_REG_GPIO_RX_DBG, 0);
+        _wb_iface->poke16(E100_REG_GPIO_TX_DBG, 0);
     }
 
-    ~usrp_e100_dboard_iface(void){
+    ~e100_dboard_iface(void){
         /* NOP */
     }
 
@@ -94,7 +99,9 @@ public:
     double get_codec_rate(unit_t);
 
 private:
-    e100_iface::sptr _iface;
+    wb_iface::sptr _wb_iface;
+    i2c_iface::sptr _i2c_iface;
+    spi_iface::sptr _spi_iface;
     e100_clock_ctrl::sptr _clock;
     e100_codec_ctrl::sptr _codec;
 };
@@ -102,25 +109,27 @@ private:
 /***********************************************************************
  * Make Function
  **********************************************************************/
-dboard_iface::sptr make_usrp_e100_dboard_iface(
-    e100_iface::sptr iface,
+dboard_iface::sptr make_e100_dboard_iface(
+    wb_iface::sptr wb_iface,
+    i2c_iface::sptr i2c_iface,
+    spi_iface::sptr spi_iface,
     e100_clock_ctrl::sptr clock,
     e100_codec_ctrl::sptr codec
 ){
-    return dboard_iface::sptr(new usrp_e100_dboard_iface(iface, clock, codec));
+    return dboard_iface::sptr(new e100_dboard_iface(wb_iface, i2c_iface, spi_iface, clock, codec));
 }
 
 /***********************************************************************
  * Clock Rates
  **********************************************************************/
-void usrp_e100_dboard_iface::set_clock_rate(unit_t unit, double rate){
+void e100_dboard_iface::set_clock_rate(unit_t unit, double rate){
     switch(unit){
     case UNIT_RX: return _clock->set_rx_dboard_clock_rate(rate);
     case UNIT_TX: return _clock->set_tx_dboard_clock_rate(rate);
     }
 }
 
-std::vector<double> usrp_e100_dboard_iface::get_clock_rates(unit_t unit){
+std::vector<double> e100_dboard_iface::get_clock_rates(unit_t unit){
     switch(unit){
     case UNIT_RX: return _clock->get_rx_dboard_clock_rates();
     case UNIT_TX: return _clock->get_tx_dboard_clock_rates();
@@ -128,7 +137,7 @@ std::vector<double> usrp_e100_dboard_iface::get_clock_rates(unit_t unit){
     }
 }
 
-double usrp_e100_dboard_iface::get_clock_rate(unit_t unit){
+double e100_dboard_iface::get_clock_rate(unit_t unit){
     switch(unit){
     case UNIT_RX: return _clock->get_rx_clock_rate();
     case UNIT_TX: return _clock->get_tx_clock_rate();
@@ -136,51 +145,51 @@ double usrp_e100_dboard_iface::get_clock_rate(unit_t unit){
     UHD_THROW_INVALID_CODE_PATH();
 }
 
-void usrp_e100_dboard_iface::set_clock_enabled(unit_t unit, bool enb){
+void e100_dboard_iface::set_clock_enabled(unit_t unit, bool enb){
     switch(unit){
     case UNIT_RX: return _clock->enable_rx_dboard_clock(enb);
     case UNIT_TX: return _clock->enable_tx_dboard_clock(enb);
     }
 }
 
-double usrp_e100_dboard_iface::get_codec_rate(unit_t){
+double e100_dboard_iface::get_codec_rate(unit_t){
     return _clock->get_fpga_clock_rate();
 }
 
 /***********************************************************************
  * GPIO
  **********************************************************************/
-void usrp_e100_dboard_iface::_set_pin_ctrl(unit_t unit, boost::uint16_t value){
+void e100_dboard_iface::_set_pin_ctrl(unit_t unit, boost::uint16_t value){
     UHD_ASSERT_THROW(GPIO_SEL_ATR == 1); //make this assumption
     switch(unit){
-    case UNIT_RX: _iface->poke16(E100_REG_GPIO_RX_SEL, value); return;
-    case UNIT_TX: _iface->poke16(E100_REG_GPIO_TX_SEL, value); return;
+    case UNIT_RX: _wb_iface->poke16(E100_REG_GPIO_RX_SEL, value); return;
+    case UNIT_TX: _wb_iface->poke16(E100_REG_GPIO_TX_SEL, value); return;
     }
 }
 
-void usrp_e100_dboard_iface::_set_gpio_ddr(unit_t unit, boost::uint16_t value){
+void e100_dboard_iface::_set_gpio_ddr(unit_t unit, boost::uint16_t value){
     switch(unit){
-    case UNIT_RX: _iface->poke16(E100_REG_GPIO_RX_DDR, value); return;
-    case UNIT_TX: _iface->poke16(E100_REG_GPIO_TX_DDR, value); return;
+    case UNIT_RX: _wb_iface->poke16(E100_REG_GPIO_RX_DDR, value); return;
+    case UNIT_TX: _wb_iface->poke16(E100_REG_GPIO_TX_DDR, value); return;
     }
 }
 
-void usrp_e100_dboard_iface::_set_gpio_out(unit_t unit, boost::uint16_t value){
+void e100_dboard_iface::_set_gpio_out(unit_t unit, boost::uint16_t value){
     switch(unit){
-    case UNIT_RX: _iface->poke16(E100_REG_GPIO_RX_IO, value); return;
-    case UNIT_TX: _iface->poke16(E100_REG_GPIO_TX_IO, value); return;
+    case UNIT_RX: _wb_iface->poke16(E100_REG_GPIO_RX_IO, value); return;
+    case UNIT_TX: _wb_iface->poke16(E100_REG_GPIO_TX_IO, value); return;
     }
 }
 
-boost::uint16_t usrp_e100_dboard_iface::read_gpio(unit_t unit){
+boost::uint16_t e100_dboard_iface::read_gpio(unit_t unit){
     switch(unit){
-    case UNIT_RX: return _iface->peek16(E100_REG_GPIO_RX_IO);
-    case UNIT_TX: return _iface->peek16(E100_REG_GPIO_TX_IO);
+    case UNIT_RX: return _wb_iface->peek16(E100_REG_GPIO_RX_IO);
+    case UNIT_TX: return _wb_iface->peek16(E100_REG_GPIO_TX_IO);
     default: UHD_THROW_INVALID_CODE_PATH();
     }
 }
 
-void usrp_e100_dboard_iface::_set_atr_reg(unit_t unit, atr_reg_t atr, boost::uint16_t value){
+void e100_dboard_iface::_set_atr_reg(unit_t unit, atr_reg_t atr, boost::uint16_t value){
     //define mapping of unit to atr regs to register address
     static const uhd::dict<
         unit_t, uhd::dict<atr_reg_t, boost::uint32_t>
@@ -198,10 +207,10 @@ void usrp_e100_dboard_iface::_set_atr_reg(unit_t unit, atr_reg_t atr, boost::uin
             (ATR_REG_FULL_DUPLEX, E100_REG_ATR_FULL_TXSIDE)
         )
     ;
-    _iface->poke16(unit_to_atr_to_addr[unit][atr], value);
+    _wb_iface->poke16(unit_to_atr_to_addr[unit][atr], value);
 }
 
-void usrp_e100_dboard_iface::set_gpio_debug(unit_t unit, int which){
+void e100_dboard_iface::set_gpio_debug(unit_t unit, int which){
     //set this unit to all outputs
     this->set_gpio_ddr(unit, 0xffff);
 
@@ -213,13 +222,13 @@ void usrp_e100_dboard_iface::set_gpio_debug(unit_t unit, int which){
     //set the debug on and which debug selection
     switch(unit){
     case UNIT_RX:
-        _iface->poke16(E100_REG_GPIO_RX_DBG, 0xffff);
-        _iface->poke16(E100_REG_GPIO_RX_SEL, dbg_sels);
+        _wb_iface->poke16(E100_REG_GPIO_RX_DBG, 0xffff);
+        _wb_iface->poke16(E100_REG_GPIO_RX_SEL, dbg_sels);
         return;
 
     case UNIT_TX:
-        _iface->poke16(E100_REG_GPIO_TX_DBG, 0xffff);
-        _iface->poke16(E100_REG_GPIO_TX_SEL, dbg_sels);
+        _wb_iface->poke16(E100_REG_GPIO_TX_DBG, 0xffff);
+        _wb_iface->poke16(E100_REG_GPIO_TX_SEL, dbg_sels);
         return;
     }
 }
@@ -240,39 +249,39 @@ static boost::uint32_t unit_to_otw_spi_dev(dboard_iface::unit_t unit){
     UHD_THROW_INVALID_CODE_PATH();
 }
 
-void usrp_e100_dboard_iface::write_spi(
+void e100_dboard_iface::write_spi(
     unit_t unit,
     const spi_config_t &config,
     boost::uint32_t data,
     size_t num_bits
 ){
-    _iface->write_spi(unit_to_otw_spi_dev(unit), config, data, num_bits);
+    _spi_iface->write_spi(unit_to_otw_spi_dev(unit), config, data, num_bits);
 }
 
-boost::uint32_t usrp_e100_dboard_iface::read_write_spi(
+boost::uint32_t e100_dboard_iface::read_write_spi(
     unit_t unit,
     const spi_config_t &config,
     boost::uint32_t data,
     size_t num_bits
 ){
-    return _iface->read_spi(unit_to_otw_spi_dev(unit), config, data, num_bits);
+    return _spi_iface->read_spi(unit_to_otw_spi_dev(unit), config, data, num_bits);
 }
 
 /***********************************************************************
  * I2C
  **********************************************************************/
-void usrp_e100_dboard_iface::write_i2c(boost::uint8_t addr, const byte_vector_t &bytes){
-    return _iface->write_i2c(addr, bytes);
+void e100_dboard_iface::write_i2c(boost::uint8_t addr, const byte_vector_t &bytes){
+    return _i2c_iface->write_i2c(addr, bytes);
 }
 
-byte_vector_t usrp_e100_dboard_iface::read_i2c(boost::uint8_t addr, size_t num_bytes){
-    return _iface->read_i2c(addr, num_bytes);
+byte_vector_t e100_dboard_iface::read_i2c(boost::uint8_t addr, size_t num_bytes){
+    return _i2c_iface->read_i2c(addr, num_bytes);
 }
 
 /***********************************************************************
  * Aux DAX/ADC
  **********************************************************************/
-void usrp_e100_dboard_iface::write_aux_dac(dboard_iface::unit_t, aux_dac_t which, double value){
+void e100_dboard_iface::write_aux_dac(dboard_iface::unit_t, aux_dac_t which, double value){
     //same aux dacs for each unit
     static const uhd::dict<aux_dac_t, e100_codec_ctrl::aux_dac_t> which_to_aux_dac = map_list_of
         (AUX_DAC_A, e100_codec_ctrl::AUX_DAC_A)
@@ -283,7 +292,7 @@ void usrp_e100_dboard_iface::write_aux_dac(dboard_iface::unit_t, aux_dac_t which
     _codec->write_aux_dac(which_to_aux_dac[which], value);
 }
 
-double usrp_e100_dboard_iface::read_aux_adc(dboard_iface::unit_t unit, aux_adc_t which){
+double e100_dboard_iface::read_aux_adc(dboard_iface::unit_t unit, aux_adc_t which){
     static const uhd::dict<
         unit_t, uhd::dict<aux_adc_t, e100_codec_ctrl::aux_adc_t>
     > unit_to_which_to_aux_adc = map_list_of
diff --git a/host/lib/usrp/e100/e100_ctrl.cpp b/host/lib/usrp/e100/e100_ctrl.cpp
new file mode 100644
index 000000000..87f7855d3
--- /dev/null
+++ b/host/lib/usrp/e100/e100_ctrl.cpp
@@ -0,0 +1,286 @@
+//
+// Copyright 2011 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#include "e100_ctrl.hpp"
+#include "e100_regs.hpp"
+#include <uhd/exception.hpp>
+#include <uhd/utils/msg.hpp>
+#include <sys/ioctl.h> //ioctl
+#include <fcntl.h> //open, close
+#include <linux/usrp_e.h> //ioctl structures and constants
+#include <boost/thread/thread.hpp> //sleep
+#include <boost/thread/mutex.hpp>
+#include <boost/format.hpp>
+#include <fstream>
+
+using namespace uhd;
+
+/***********************************************************************
+ * Sysfs GPIO wrapper class
+ **********************************************************************/
+class gpio{
+public:
+    gpio(const int num, const std::string &dir) : _num(num){
+        this->set_xport("export");
+        this->set_dir(dir);
+        _value_file.open(str(boost::format("/sys/class/gpio/gpio%d/value") % num).c_str(), std::ios_base::in | std::ios_base::out);
+    }
+    ~gpio(void){
+        _value_file.close();
+        this->set_dir("in");
+        this->set_xport("unexport");
+    }
+    void operator()(const int val){
+        _value_file << val << std::endl << std::flush;
+    }
+    int operator()(void){
+        std::string val;
+        std::getline(_value_file, val);
+        _value_file.seekg(0);
+        return int(val.at(0) - '0') & 0x1;
+    }
+private:
+    void set_xport(const std::string &xport){
+        std::ofstream export_file(("/sys/class/gpio/" + xport).c_str());
+        export_file << _num << std::endl << std::flush;
+        export_file.close();
+    }
+    void set_dir(const std::string &dir){
+        std::ofstream dir_file(str(boost::format("/sys/class/gpio/gpio%d/direction") % _num).c_str());
+        dir_file << dir << std::endl << std::flush;
+        dir_file.close();
+    }
+    const int _num;
+    std::fstream _value_file;
+};
+
+/***********************************************************************
+ * Aux spi implementation
+ **********************************************************************/
+class aux_spi_iface_impl : public spi_iface{
+public:
+    aux_spi_iface_impl(void):
+        spi_sclk_gpio(65, "out"),
+        spi_sen_gpio(186, "out"),
+        spi_mosi_gpio(145, "out"),
+        spi_miso_gpio(147, "in"){}
+
+    boost::uint32_t transact_spi(
+        int, const spi_config_t &, //not used params
+        boost::uint32_t bits,
+        size_t num_bits,
+        bool readback
+    ){
+        boost::uint32_t rb_bits = 0;
+        this->spi_sen_gpio(0);
+
+        for (size_t i = 0; i < num_bits; i++){
+            this->spi_sclk_gpio(0);
+            this->spi_mosi_gpio((bits >> (num_bits-i-1)) & 0x1);
+            boost::this_thread::sleep(boost::posix_time::microseconds(10));
+            if (readback) rb_bits = (rb_bits << 1) | this->spi_miso_gpio();
+            this->spi_sclk_gpio(1);
+            boost::this_thread::sleep(boost::posix_time::microseconds(10));
+        }
+
+        this->spi_sen_gpio(1);
+        boost::this_thread::sleep(boost::posix_time::microseconds(100));
+        return rb_bits;
+    }
+
+private:
+    gpio spi_sclk_gpio, spi_sen_gpio, spi_mosi_gpio, spi_miso_gpio;
+};
+
+uhd::spi_iface::sptr e100_ctrl::make_aux_spi_iface(void){
+    return uhd::spi_iface::sptr(new aux_spi_iface_impl());
+}
+
+/***********************************************************************
+ * I2C device node implementation wrapper
+ **********************************************************************/
+#include <linux/i2c-dev.h>
+#include <linux/i2c.h>
+class i2c_dev_iface : public i2c_iface{
+public:
+    i2c_dev_iface(const std::string &node){
+        if ((_node_fd = ::open(node.c_str(), O_RDWR)) < 0){
+            throw uhd::io_error("Failed to open " + node);
+        }
+    }
+
+    ~i2c_dev_iface(void){
+        ::close(_node_fd);
+    }
+
+    void write_i2c(boost::uint8_t addr, const byte_vector_t &bytes){
+        byte_vector_t rw_bytes(bytes);
+
+        //setup the message
+        i2c_msg msg;
+        msg.addr = addr;
+        msg.flags = 0;
+        msg.len = bytes.size();
+        msg.buf = &rw_bytes.front();
+
+        //setup the data
+        i2c_rdwr_ioctl_data data;
+        data.msgs = &msg;
+        data.nmsgs = 1;
+
+        //call the ioctl
+        UHD_ASSERT_THROW(::ioctl(_node_fd, I2C_RDWR, &data) >= 0);
+    }
+
+    byte_vector_t read_i2c(boost::uint8_t addr, size_t num_bytes){
+        byte_vector_t bytes(num_bytes);
+
+        //setup the message
+        i2c_msg msg;
+        msg.addr = addr;
+        msg.flags = I2C_M_RD;
+        msg.len = bytes.size();
+        msg.buf = &bytes.front();
+
+        //setup the data
+        i2c_rdwr_ioctl_data data;
+        data.msgs = &msg;
+        data.nmsgs = 1;
+
+        //call the ioctl
+        UHD_ASSERT_THROW(::ioctl(_node_fd, I2C_RDWR, &data) >= 0);
+
+        return bytes;
+    }
+
+private: int _node_fd;
+};
+
+uhd::i2c_iface::sptr e100_ctrl::make_dev_i2c_iface(const std::string &node){
+    return uhd::i2c_iface::sptr(new i2c_dev_iface(node));
+}
+
+/***********************************************************************
+ * USRP-E100 control implementation
+ **********************************************************************/
+class e100_ctrl_impl : public e100_ctrl{
+public:
+
+    int get_file_descriptor(void){
+        return _node_fd;
+    }
+
+    /*******************************************************************
+     * Structors
+     ******************************************************************/
+    e100_ctrl_impl(const std::string &node){
+        UHD_MSG(status) << "Opening device node " << node << "..." << std::endl;
+
+        //open the device node and check file descriptor
+        if ((_node_fd = ::open(node.c_str(), O_RDWR)) < 0){
+            throw uhd::io_error("Failed to open " + node);
+        }
+
+        //check the module compatibility number
+        int module_compat_num = ::ioctl(_node_fd, USRP_E_GET_COMPAT_NUMBER, NULL);
+        if (module_compat_num != USRP_E_COMPAT_NUMBER){
+            throw uhd::runtime_error(str(boost::format(
+                "Expected module compatibility number 0x%x, but got 0x%x:\n"
+                "The module build is not compatible with the host code build."
+            ) % USRP_E_COMPAT_NUMBER % module_compat_num));
+        }
+
+        //perform a global reset after opening
+        this->poke32(E100_REG_GLOBAL_RESET, 0);
+    }
+
+    ~e100_ctrl_impl(void){
+        ::close(_node_fd);
+    }
+
+    /*******************************************************************
+     * IOCTL: provides the communication base for all other calls
+     ******************************************************************/
+    void ioctl(int request, void *mem){
+        boost::mutex::scoped_lock lock(_ioctl_mutex);
+
+        if (::ioctl(_node_fd, request, mem) < 0){
+            throw uhd::os_error(str(
+                boost::format("ioctl failed with request %d") % request
+            ));
+        }
+    }
+    /*******************************************************************
+     * Peek and Poke
+     ******************************************************************/
+    void poke32(wb_addr_type addr, boost::uint32_t value){
+        //load the data struct
+        usrp_e_ctl32 data;
+        data.offset = addr;
+        data.count = 1;
+        data.buf[0] = value;
+
+        //call the ioctl
+        this->ioctl(USRP_E_WRITE_CTL32, &data);
+    }
+
+    void poke16(wb_addr_type addr, boost::uint16_t value){
+        //load the data struct
+        usrp_e_ctl16 data;
+        data.offset = addr;
+        data.count = 1;
+        data.buf[0] = value;
+
+        //call the ioctl
+        this->ioctl(USRP_E_WRITE_CTL16, &data);
+    }
+
+    boost::uint32_t peek32(wb_addr_type addr){
+        //load the data struct
+        usrp_e_ctl32 data;
+        data.offset = addr;
+        data.count = 1;
+
+        //call the ioctl
+        this->ioctl(USRP_E_READ_CTL32, &data);
+
+        return data.buf[0];
+    }
+
+    boost::uint16_t peek16(wb_addr_type addr){
+        //load the data struct
+        usrp_e_ctl16 data;
+        data.offset = addr;
+        data.count = 1;
+
+        //call the ioctl
+        this->ioctl(USRP_E_READ_CTL16, &data);
+
+        return data.buf[0];
+    }
+
+private:
+    int _node_fd;
+    boost::mutex _ioctl_mutex;
+};
+
+/***********************************************************************
+ * Public Make Function
+ **********************************************************************/
+e100_ctrl::sptr e100_ctrl::make(const std::string &node){
+    return sptr(new e100_ctrl_impl(node));
+}
diff --git a/host/lib/usrp/e100/e100_ctrl.hpp b/host/lib/usrp/e100/e100_ctrl.hpp
new file mode 100644
index 000000000..8520ea595
--- /dev/null
+++ b/host/lib/usrp/e100/e100_ctrl.hpp
@@ -0,0 +1,45 @@
+//
+// Copyright 2011 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#ifndef INCLUDED_B100_CTRL_HPP
+#define INCLUDED_B100_CTRL_HPP
+
+#include "wb_iface.hpp"
+#include <uhd/types/serial.hpp>
+#include <boost/shared_ptr.hpp>
+#include <boost/utility.hpp>
+
+class e100_ctrl : boost::noncopyable, public wb_iface{
+public:
+    typedef boost::shared_ptr<e100_ctrl> sptr;
+
+    //! Make a new controller for E100
+    static sptr make(const std::string &node);
+
+    //! Make an i2c iface for the i2c device node
+    static uhd::i2c_iface::sptr make_dev_i2c_iface(const std::string &node);
+
+    //! Make an i2c iface for the i2c device node
+    static uhd::spi_iface::sptr make_aux_spi_iface(void);
+
+    virtual void ioctl(int request, void *mem) = 0;
+
+    virtual int get_file_descriptor(void) = 0;
+
+};
+
+#endif /* INCLUDED_B100_CTRL_HPP */
diff --git a/host/lib/usrp/e100/e100_impl.cpp b/host/lib/usrp/e100/e100_impl.cpp
index 96ac6548b..248ad52d2 100644
--- a/host/lib/usrp/e100/e100_impl.cpp
+++ b/host/lib/usrp/e100/e100_impl.cpp
@@ -18,8 +18,6 @@
 #include "e100_impl.hpp"
 #include "e100_regs.hpp"
 #include <uhd/utils/msg.hpp>
-#include <uhd/usrp/device_props.hpp>
-#include <uhd/usrp/mboard_props.hpp>
 #include <uhd/exception.hpp>
 #include <uhd/utils/static.hpp>
 #include <uhd/utils/images.hpp>
@@ -27,12 +25,21 @@
 #include <boost/format.hpp>
 #include <boost/filesystem.hpp>
 #include <boost/functional/hash.hpp>
+#include <boost/assign/list_of.hpp>
 #include <fstream>
 
 using namespace uhd;
 using namespace uhd::usrp;
 namespace fs = boost::filesystem;
 
+////////////////////////////////////////////////////////////////////////
+// I2C addresses
+////////////////////////////////////////////////////////////////////////
+#define I2C_DEV_EEPROM  0x50 // 24LC02[45]:  7-bits 1010xxx
+#define	I2C_ADDR_MBOARD (I2C_DEV_EEPROM | 0x0)
+#define	I2C_ADDR_TX_DB  (I2C_DEV_EEPROM | 0x4)
+#define	I2C_ADDR_RX_DB  (I2C_DEV_EEPROM | 0x5)
+
 /***********************************************************************
  * Discovery
  **********************************************************************/
@@ -55,9 +62,10 @@ static device_addrs_t e100_find(const device_addr_t &hint){
         new_addr["type"] = "e100";
         new_addr["node"] = fs::system_complete(fs::path(hint["node"])).string();
         try{
-            e100_iface::sptr iface = e100_iface::make();
-            new_addr["name"] = iface->mb_eeprom["name"];
-            new_addr["serial"] = iface->mb_eeprom["serial"];
+            i2c_iface::sptr i2c_iface = e100_ctrl::make_dev_i2c_iface(E100_I2C_DEV_NODE);
+            const mboard_eeprom_t mb_eeprom(*i2c_iface, mboard_eeprom_t::MAP_E100);
+            new_addr["name"] = mb_eeprom["name"];
+            new_addr["serial"] = mb_eeprom["serial"];
         }
         catch(const std::exception &e){
             new_addr["name"] = "";
@@ -87,12 +95,23 @@ static size_t hash_fpga_file(const std::string &file_path){
 }
 
 static device::sptr e100_make(const device_addr_t &device_addr){
+    return device::sptr(new e100_impl(device_addr));
+}
+
+UHD_STATIC_BLOCK(register_e100_device){
+    device::register_device(&e100_find, &e100_make);
+}
+
+/***********************************************************************
+ * Structors
+ **********************************************************************/
+e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
 
     //setup the main interface into fpga
     const std::string node = device_addr["node"];
-    e100_iface::sptr iface = e100_iface::make();
+    _fpga_ctrl = e100_ctrl::make(node);
 
-    //extract the fpga path for usrp-e and compute hash
+    //extract the fpga path and compute hash
     const std::string e100_fpga_image = find_image_path(device_addr.get("fpga", E100_FPGA_FILE_NAME));
     const boost::uint32_t file_hash = boost::uint32_t(hash_fpga_file(e100_fpga_image));
 
@@ -100,23 +119,23 @@ static device::sptr e100_make(const device_addr_t &device_addr){
     // - close the device node
     // - load the fpga bin file
     // - re-open the device node
-    iface->open(node); //open here so we can do FPGA hash check
-    if (iface->peek32(E100_REG_RB_MISC_TEST32) != file_hash){
-        iface->close();
+    if (_fpga_ctrl->peek32(E100_REG_RB_MISC_TEST32) != file_hash){
+        _fpga_ctrl.reset();
         e100_load_fpga(e100_fpga_image);
-        iface->open(node);
+        _fpga_ctrl = e100_ctrl::make(node);
     }
 
     //setup clock control here to ensure that the FPGA has a good clock before we continue
     const double master_clock_rate = device_addr.cast<double>("master_clock_rate", E100_DEFAULT_CLOCK_RATE);
-    e100_clock_ctrl::sptr clock_ctrl = e100_clock_ctrl::make(iface, master_clock_rate);
+    _aux_spi_iface = e100_ctrl::make_aux_spi_iface();
+    _clock_ctrl = e100_clock_ctrl::make(_aux_spi_iface, master_clock_rate);
 
     //Perform wishbone readback tests, these tests also write the hash
     bool test_fail = false;
     UHD_MSG(status) << "Performing wishbone readback test... " << std::flush;
     for (size_t i = 0; i < 100; i++){
-        iface->poke32(E100_REG_SR_MISC_TEST32, file_hash);
-        test_fail = iface->peek32(E100_REG_RB_MISC_TEST32) != file_hash;
+        _fpga_ctrl->poke32(E100_REG_SR_MISC_TEST32, file_hash);
+        test_fail = _fpga_ctrl->peek32(E100_REG_RB_MISC_TEST32) != file_hash;
         if (test_fail) break; //exit loop on any failure
     }
     UHD_MSG(status) << ((test_fail)? " fail" : "pass") << std::endl;
@@ -128,7 +147,7 @@ static device::sptr e100_make(const device_addr_t &device_addr){
     );
 
     //check that the compatibility is correct
-    const boost::uint16_t fpga_compat_num = iface->peek16(E100_REG_MISC_COMPAT);
+    const boost::uint16_t fpga_compat_num = _fpga_ctrl->peek16(E100_REG_MISC_COMPAT);
     if (fpga_compat_num != E100_FPGA_COMPAT_NUM){
         throw uhd::runtime_error(str(boost::format(
             "\nPlease update the FPGA image for your device.\n"
@@ -138,91 +157,232 @@ static device::sptr e100_make(const device_addr_t &device_addr){
         ) % E100_FPGA_COMPAT_NUM % fpga_compat_num));
     }
 
-    return device::sptr(new e100_impl(device_addr, iface, clock_ctrl));
-}
+    ////////////////////////////////////////////////////////////////////
+    // Create controller objects
+    ////////////////////////////////////////////////////////////////////
+    _fpga_i2c_ctrl = i2c_core_100::make(_fpga_ctrl, E100_REG_SLAVE(3));
+    _fpga_spi_ctrl = spi_core_100::make(_fpga_ctrl, E100_REG_SLAVE(2));
+    _dev_i2c_iface = e100_ctrl::make_dev_i2c_iface(E100_I2C_DEV_NODE);
+    _data_transport = e100_make_mmap_zero_copy(_fpga_ctrl);
+
+    ////////////////////////////////////////////////////////////////////
+    // Initialize the properties tree
+    ////////////////////////////////////////////////////////////////////
+    _tree = property_tree::make();
+    _tree->create<std::string>("/name").set("E-Series Device");
+    const property_tree::path_type mb_path = "/mboards/0";
+    _tree->create<std::string>(mb_path / "name").set("E100 (euewanee)");
+
+    ////////////////////////////////////////////////////////////////////
+    // setup the mboard eeprom
+    ////////////////////////////////////////////////////////////////////
+    const mboard_eeprom_t mb_eeprom(*_dev_i2c_iface, mboard_eeprom_t::MAP_E100);
+    _tree->create<mboard_eeprom_t>(mb_path / "eeprom")
+        .set(mb_eeprom)
+        .subscribe(boost::bind(&e100_impl::set_mb_eeprom, this, _1));
+
+    ////////////////////////////////////////////////////////////////////
+    // create clock control objects
+    ////////////////////////////////////////////////////////////////////
+    //^^^ clock created up top, just reg props here... ^^^
+    _tree->create<double>(mb_path / "tick_rate")
+        .publish(boost::bind(&e100_clock_ctrl::get_fpga_clock_rate, _clock_ctrl))
+        .subscribe(boost::bind(&e100_impl::update_tick_rate, this, _1));
+
+    ////////////////////////////////////////////////////////////////////
+    // create codec control objects
+    ////////////////////////////////////////////////////////////////////
+    _codec_ctrl = e100_codec_ctrl::make(_fpga_spi_ctrl);
+    const property_tree::path_type rx_codec_path = mb_path / "rx_codecs/A";
+    const property_tree::path_type tx_codec_path = mb_path / "tx_codecs/A";
+    _tree->create<std::string>(rx_codec_path / "name").set("ad9522");
+    _tree->create<meta_range_t>(rx_codec_path / "gains/pga/range").set(e100_codec_ctrl::rx_pga_gain_range);
+    _tree->create<double>(rx_codec_path / "gains/pga/value")
+        .coerce(boost::bind(&e100_impl::update_rx_codec_gain, this, _1));
+    _tree->create<std::string>(tx_codec_path / "name").set("ad9522");
+    _tree->create<meta_range_t>(tx_codec_path / "gains/pga/range").set(e100_codec_ctrl::tx_pga_gain_range);
+    _tree->create<double>(tx_codec_path / "gains/pga/value")
+        .subscribe(boost::bind(&e100_codec_ctrl::set_tx_pga_gain, _codec_ctrl, _1))
+        .publish(boost::bind(&e100_codec_ctrl::get_tx_pga_gain, _codec_ctrl));
+
+    ////////////////////////////////////////////////////////////////////
+    // and do the misc mboard sensors
+    ////////////////////////////////////////////////////////////////////
+    //none for now...
+    _tree->create<int>(mb_path / "sensors"); //phony property so this dir exists
+
+    ////////////////////////////////////////////////////////////////////
+    // create frontend control objects
+    ////////////////////////////////////////////////////////////////////
+    _rx_fe = rx_frontend_core_200::make(_fpga_ctrl, E100_REG_SR_ADDR(UE_SR_RX_FRONT));
+    _tx_fe = tx_frontend_core_200::make(_fpga_ctrl, E100_REG_SR_ADDR(UE_SR_TX_FRONT));
+    //TODO lots of properties to expose here for frontends
+    _tree->create<subdev_spec_t>(mb_path / "rx_subdev_spec")
+        .subscribe(boost::bind(&e100_impl::update_rx_subdev_spec, this, _1));
+    _tree->create<subdev_spec_t>(mb_path / "tx_subdev_spec")
+        .subscribe(boost::bind(&e100_impl::update_tx_subdev_spec, this, _1));
+
+    ////////////////////////////////////////////////////////////////////
+    // create rx dsp control objects
+    ////////////////////////////////////////////////////////////////////
+    _rx_dsps.push_back(rx_dsp_core_200::make(
+        _fpga_ctrl, E100_REG_SR_ADDR(UE_SR_RX_DSP0), E100_REG_SR_ADDR(UE_SR_RX_CTRL0), E100_RX_SID_BASE + 0
+    ));
+    _rx_dsps.push_back(rx_dsp_core_200::make(
+        _fpga_ctrl, E100_REG_SR_ADDR(UE_SR_RX_DSP1), E100_REG_SR_ADDR(UE_SR_RX_CTRL1), E100_RX_SID_BASE + 1
+    ));
+    for (size_t dspno = 0; dspno < _rx_dsps.size(); dspno++){
+        _tree->access<double>(mb_path / "tick_rate")
+            .subscribe(boost::bind(&rx_dsp_core_200::set_tick_rate, _rx_dsps[dspno], _1));
+        property_tree::path_type rx_dsp_path = mb_path / str(boost::format("rx_dsps/%u") % dspno);
+        _tree->create<double>(rx_dsp_path / "rate/value")
+            .coerce(boost::bind(&rx_dsp_core_200::set_host_rate, _rx_dsps[dspno], _1))
+            .subscribe(boost::bind(&e100_impl::update_rx_samp_rate, this, _1));
+        _tree->create<double>(rx_dsp_path / "freq/value")
+            .coerce(boost::bind(&rx_dsp_core_200::set_freq, _rx_dsps[dspno], _1));
+        _tree->create<meta_range_t>(rx_dsp_path / "freq/range")
+            .publish(boost::bind(&rx_dsp_core_200::get_freq_range, _rx_dsps[dspno]));
+        _tree->create<stream_cmd_t>(rx_dsp_path / "stream_cmd")
+            .subscribe(boost::bind(&rx_dsp_core_200::issue_stream_command, _rx_dsps[dspno], _1));
+    }
 
-UHD_STATIC_BLOCK(register_e100_device){
-    device::register_device(&e100_find, &e100_make);
-}
+    ////////////////////////////////////////////////////////////////////
+    // create tx dsp control objects
+    ////////////////////////////////////////////////////////////////////
+    _tx_dsp = tx_dsp_core_200::make(
+        _fpga_ctrl, E100_REG_SR_ADDR(UE_SR_TX_DSP), E100_REG_SR_ADDR(UE_SR_TX_CTRL), E100_TX_ASYNC_SID
+    );
+    _tree->access<double>(mb_path / "tick_rate")
+        .subscribe(boost::bind(&tx_dsp_core_200::set_tick_rate, _tx_dsp, _1));
+    _tree->create<double>(mb_path / "tx_dsps/0/rate/value")
+        .coerce(boost::bind(&tx_dsp_core_200::set_host_rate, _tx_dsp, _1))
+        .subscribe(boost::bind(&e100_impl::update_tx_samp_rate, this, _1));
+    _tree->create<double>(mb_path / "tx_dsps/0/freq/value")
+        .coerce(boost::bind(&tx_dsp_core_200::set_freq, _tx_dsp, _1));
+    _tree->create<meta_range_t>(mb_path / "tx_dsps/0/freq/range")
+        .publish(boost::bind(&tx_dsp_core_200::get_freq_range, _tx_dsp));
+
+    ////////////////////////////////////////////////////////////////////
+    // create time control objects
+    ////////////////////////////////////////////////////////////////////
+    time64_core_200::readback_bases_type time64_rb_bases;
+    time64_rb_bases.rb_secs_now = E100_REG_RB_TIME_NOW_SECS;
+    time64_rb_bases.rb_ticks_now = E100_REG_RB_TIME_NOW_TICKS;
+    time64_rb_bases.rb_secs_pps = E100_REG_RB_TIME_PPS_SECS;
+    time64_rb_bases.rb_ticks_pps = E100_REG_RB_TIME_PPS_TICKS;
+    _time64 = time64_core_200::make(
+        _fpga_ctrl, E100_REG_SR_ADDR(UE_SR_TIME64), time64_rb_bases
+    );
+    _tree->access<double>(mb_path / "tick_rate")
+        .subscribe(boost::bind(&time64_core_200::set_tick_rate, _time64, _1));
+    _tree->create<time_spec_t>(mb_path / "time/now")
+        .publish(boost::bind(&time64_core_200::get_time_now, _time64))
+        .subscribe(boost::bind(&time64_core_200::set_time_now, _time64, _1));
+    _tree->create<time_spec_t>(mb_path / "time/pps")
+        .publish(boost::bind(&time64_core_200::get_time_last_pps, _time64))
+        .subscribe(boost::bind(&time64_core_200::set_time_next_pps, _time64, _1));
+    //setup time source props
+    _tree->create<std::string>(mb_path / "time_source/value")
+        .subscribe(boost::bind(&time64_core_200::set_time_source, _time64, _1));
+    _tree->create<std::vector<std::string> >(mb_path / "time_source/options")
+        .publish(boost::bind(&time64_core_200::get_time_sources, _time64));
+    //setup reference source props
+    _tree->create<std::string>(mb_path / "ref_source/value")
+        .subscribe(boost::bind(&e100_impl::update_ref_source, this, _1));
+    static const std::vector<std::string> ref_sources = boost::assign::list_of("internal")("sma")("auto");
+    _tree->create<std::vector<std::string> >(mb_path / "ref_source/options").set(ref_sources);
+
+    ////////////////////////////////////////////////////////////////////
+    // create dboard control objects
+    ////////////////////////////////////////////////////////////////////
+
+    //read the dboard eeprom to extract the dboard ids
+    dboard_eeprom_t rx_db_eeprom, tx_db_eeprom, gdb_eeprom;
+    rx_db_eeprom.load(*_fpga_i2c_ctrl, I2C_ADDR_RX_DB);
+    tx_db_eeprom.load(*_fpga_i2c_ctrl, I2C_ADDR_TX_DB);
+    gdb_eeprom.load(*_fpga_i2c_ctrl, I2C_ADDR_TX_DB ^ 5);
+
+    //create the properties and register subscribers
+    _tree->create<dboard_eeprom_t>(mb_path / "dboards/A/rx_eeprom")
+        .set(rx_db_eeprom)
+        .subscribe(boost::bind(&e100_impl::set_db_eeprom, this, "rx", _1));
+    _tree->create<dboard_eeprom_t>(mb_path / "dboards/A/tx_eeprom")
+        .set(tx_db_eeprom)
+        .subscribe(boost::bind(&e100_impl::set_db_eeprom, this, "tx", _1));
+    _tree->create<dboard_eeprom_t>(mb_path / "dboards/A/gdb_eeprom")
+        .set(gdb_eeprom)
+        .subscribe(boost::bind(&e100_impl::set_db_eeprom, this, "gdb", _1));
+
+    //create a new dboard interface and manager
+    _dboard_iface = make_e100_dboard_iface(_fpga_ctrl, _fpga_i2c_ctrl, _fpga_spi_ctrl, _clock_ctrl, _codec_ctrl);
+    _tree->create<dboard_iface::sptr>(mb_path / "dboards/A/iface").set(_dboard_iface);
+    _dboard_manager = dboard_manager::make(
+        rx_db_eeprom.id,
+        ((gdb_eeprom.id == dboard_id_t::none())? tx_db_eeprom : gdb_eeprom).id,
+        _dboard_iface
+    );
+    BOOST_FOREACH(const std::string &name, _dboard_manager->get_rx_subdev_names()){
+        dboard_manager::populate_prop_tree_from_subdev(
+            _tree, mb_path / "dboards/A/rx_frontends" / name,
+            _dboard_manager->get_rx_subdev(name)
+        );
+    }
+    BOOST_FOREACH(const std::string &name, _dboard_manager->get_tx_subdev_names()){
+        dboard_manager::populate_prop_tree_from_subdev(
+            _tree, mb_path / "dboards/A/tx_frontends" / name,
+            _dboard_manager->get_tx_subdev(name)
+        );
+    }
 
-/***********************************************************************
- * Structors
- **********************************************************************/
-e100_impl::e100_impl(
-    const uhd::device_addr_t &device_addr,
-    e100_iface::sptr iface,
-    e100_clock_ctrl::sptr clock_ctrl
-):
-    _iface(iface),
-    _clock_ctrl(clock_ctrl),
-    _codec_ctrl(e100_codec_ctrl::make(_iface)),
-    _data_transport(e100_make_mmap_zero_copy(_iface)),
-    _recv_frame_size(std::min(_data_transport->get_recv_frame_size(), size_t(device_addr.cast<double>("recv_frame_size", 1e9)))),
-    _send_frame_size(std::min(_data_transport->get_send_frame_size(), size_t(device_addr.cast<double>("send_frame_size", 1e9))))
-{
-
-    //setup otw types
-    _send_otw_type.width = 16;
-    _send_otw_type.shift = 0;
-    _send_otw_type.byteorder = otw_type_t::BO_LITTLE_ENDIAN;
-
-    _recv_otw_type.width = 16;
-    _recv_otw_type.shift = 0;
-    _recv_otw_type.byteorder = otw_type_t::BO_LITTLE_ENDIAN;
-
-    //initialize the mboard
-    mboard_init();
-
-    //initialize the dboards
-    dboard_init();
-
-    //initialize the dsps
-    dsp_init();
-
-    //init the codec properties
-    codec_init();
-
-    //set default subdev specs
-    this->mboard_set(MBOARD_PROP_RX_SUBDEV_SPEC, subdev_spec_t());
-    this->mboard_set(MBOARD_PROP_TX_SUBDEV_SPEC, subdev_spec_t());
-
-    //init the io send/recv
-    io_init();
+    //initialize io handling
+    this->io_init();
+
+    ////////////////////////////////////////////////////////////////////
+    // do some post-init tasks
+    ////////////////////////////////////////////////////////////////////
+    _tree->access<double>(mb_path / "tick_rate").update() //update and then subscribe the clock callback
+        .subscribe(boost::bind(&e100_clock_ctrl::set_fpga_clock_rate, _clock_ctrl, _1));
+
+    //and now that the tick rate is set, init the host rates to something
+    BOOST_FOREACH(const std::string &name, _tree->list(mb_path / "rx_dsps")){
+        _tree->access<double>(mb_path / "rx_dsps" / name / "rate" / "value").set(1e6);
+    }
+    BOOST_FOREACH(const std::string &name, _tree->list(mb_path / "tx_dsps")){
+        _tree->access<double>(mb_path / "tx_dsps" / name / "rate" / "value").set(1e6);
+    }
+
+    _tree->access<subdev_spec_t>(mb_path / "rx_subdev_spec").set(subdev_spec_t("A:"+_dboard_manager->get_rx_subdev_names()[0]));
+    _tree->access<subdev_spec_t>(mb_path / "tx_subdev_spec").set(subdev_spec_t("A:"+_dboard_manager->get_tx_subdev_names()[0]));
+    _tree->access<std::string>(mb_path / "ref_source/value").set("internal");
+    _tree->access<std::string>(mb_path / "time_source/value").set("none");
 
 }
 
 e100_impl::~e100_impl(void){
-    _io_impl.reset(); //reset here, seems to fix hang?
+    /* NOP */
 }
 
-/***********************************************************************
- * Device Get
- **********************************************************************/
-void e100_impl::get(const wax::obj &key_, wax::obj &val){
-    named_prop_t key = named_prop_t::extract(key_);
-
-    //handle the get request conditioned on the key
-    switch(key.as<device_prop_t>()){
-    case DEVICE_PROP_NAME:
-        val = std::string("usrp-e device");
-        return;
-
-    case DEVICE_PROP_MBOARD:
-        UHD_ASSERT_THROW(key.name == "");
-        val = _mboard_proxy->get_link();
-        return;
+double e100_impl::update_rx_codec_gain(const double gain){
+    //set gain on both I and Q, readback on one
+    //TODO in the future, gains should have individual control
+    _codec_ctrl->set_rx_pga_gain(gain, 'A');
+    _codec_ctrl->set_rx_pga_gain(gain, 'B');
+    return _codec_ctrl->get_rx_pga_gain('A');
+}
 
-    case DEVICE_PROP_MBOARD_NAMES:
-        val = prop_names_t(1, ""); //vector of size 1 with empty string
-        return;
+void e100_impl::set_mb_eeprom(const uhd::usrp::mboard_eeprom_t &mb_eeprom){
+    mb_eeprom.commit(*_dev_i2c_iface, mboard_eeprom_t::MAP_E100);
+}
 
-    default: UHD_THROW_PROP_GET_ERROR();
-    }
+void e100_impl::set_db_eeprom(const std::string &type, const uhd::usrp::dboard_eeprom_t &db_eeprom){
+    if (type == "rx") db_eeprom.store(*_fpga_i2c_ctrl, I2C_ADDR_RX_DB);
+    if (type == "tx") db_eeprom.store(*_fpga_i2c_ctrl, I2C_ADDR_TX_DB);
+    if (type == "gdb") db_eeprom.store(*_fpga_i2c_ctrl, I2C_ADDR_TX_DB ^ 5);
 }
 
-/***********************************************************************
- * Device Set
- **********************************************************************/
-void e100_impl::set(const wax::obj &, const wax::obj &){
-    UHD_THROW_PROP_SET_ERROR();
+void e100_impl::update_ref_source(const std::string &source){
+    if      (source == "auto")     _clock_ctrl->use_auto_ref();
+    else if (source == "internal") _clock_ctrl->use_internal_ref();
+    else if (source == "sma")      _clock_ctrl->use_external_ref();
+    else throw uhd::runtime_error("unhandled clock configuration reference source: " + source);
 }
diff --git a/host/lib/usrp/e100/e100_impl.hpp b/host/lib/usrp/e100/e100_impl.hpp
index c7751acf9..f90e13bf7 100644
--- a/host/lib/usrp/e100/e100_impl.hpp
+++ b/host/lib/usrp/e100/e100_impl.hpp
@@ -15,13 +15,22 @@
 // along with this program.  If not, see <http://www.gnu.org/licenses/>.
 //
 
-#include "e100_iface.hpp"
+#include "e100_ctrl.hpp"
 #include "clock_ctrl.hpp"
 #include "codec_ctrl.hpp"
+#include "spi_core_100.hpp"
+#include "i2c_core_100.hpp"
+#include "rx_frontend_core_200.hpp"
+#include "tx_frontend_core_200.hpp"
+#include "rx_dsp_core_200.hpp"
+#include "tx_dsp_core_200.hpp"
+#include "time64_core_200.hpp"
 #include <uhd/device.hpp>
+#include <uhd/property_tree.hpp>
 #include <uhd/utils/pimpl.hpp>
 #include <uhd/usrp/subdev_spec.hpp>
 #include <uhd/usrp/dboard_eeprom.hpp>
+#include <uhd/usrp/mboard_eeprom.hpp>
 #include <uhd/types/otw_type.hpp>
 #include <uhd/types/clock_config.hpp>
 #include <uhd/types/stream_cmd.hpp>
@@ -31,56 +40,28 @@
 #ifndef INCLUDED_E100_IMPL_HPP
 #define INCLUDED_E100_IMPL_HPP
 
-uhd::transport::zero_copy_if::sptr e100_make_mmap_zero_copy(e100_iface::sptr iface);
+uhd::transport::zero_copy_if::sptr e100_make_mmap_zero_copy(e100_ctrl::sptr iface);
 
+static const std::string     E100_I2C_DEV_NODE = "/dev/i2c-3";
 static const std::string     E100_FPGA_FILE_NAME = "usrp_e100_fpga_v2.bin";
 static const boost::uint16_t E100_FPGA_COMPAT_NUM = 0x05;
+static const boost::uint32_t E100_RX_SID_BASE = 2;
+static const boost::uint32_t E100_TX_ASYNC_SID = 1;
 static const double          E100_DEFAULT_CLOCK_RATE = 64e6;
-static const size_t          E100_NUM_RX_DSPS = 2;
-static const size_t          E100_NUM_TX_DSPS = 1;
-static const boost::uint32_t E100_DSP_SID_BASE = 2; //leave room for other dsp (increments by 1)
-static const boost::uint32_t E100_ASYNC_SID = 1;
 
 //! load an fpga image from a bin file into the usrp-e fpga
 extern void e100_load_fpga(const std::string &bin_file);
 
-/*!
- * Make a usrp-e dboard interface.
- * \param iface the usrp-e interface object
- * \param clock the clock control interface
- * \param codec the codec control interface
- * \return a sptr to a new dboard interface
- */
-uhd::usrp::dboard_iface::sptr make_usrp_e100_dboard_iface(
-    e100_iface::sptr iface,
+//! Make an e100 dboard interface
+uhd::usrp::dboard_iface::sptr make_e100_dboard_iface(
+    wb_iface::sptr wb_iface,
+    uhd::i2c_iface::sptr i2c_iface,
+    uhd::spi_iface::sptr spi_iface,
     e100_clock_ctrl::sptr clock,
     e100_codec_ctrl::sptr codec
 );
 
 /*!
- * Simple wax obj proxy class:
- * Provides a wax obj interface for a set and a get function.
- * This allows us to create nested properties structures
- * while maintaining flattened code within the implementation.
- */
-class wax_obj_proxy : public wax::obj{
-public:
-    typedef boost::function<void(const wax::obj &, wax::obj &)>       get_t;
-    typedef boost::function<void(const wax::obj &, const wax::obj &)> set_t;
-    typedef boost::shared_ptr<wax_obj_proxy> sptr;
-
-    static sptr make(const get_t &get, const set_t &set){
-        return sptr(new wax_obj_proxy(get, set));
-    }
-
-private:
-    get_t _get; set_t _set;
-    wax_obj_proxy(const get_t &get, const set_t &set): _get(get), _set(set){};
-    void get(const wax::obj &key, wax::obj &val){return _get(key, val);}
-    void set(const wax::obj &key, const wax::obj &val){return _set(key, val);}
-};
-
-/*!
  * USRP-E100 implementation guts:
  * The implementation details are encapsulated here.
  * Handles properties on the mboard, dboard, dsps...
@@ -88,11 +69,7 @@ private:
 class e100_impl : public uhd::device{
 public:
     //structors
-    e100_impl(
-        const uhd::device_addr_t &,
-        e100_iface::sptr,
-        e100_clock_ctrl::sptr
-    );
+    e100_impl(const uhd::device_addr_t &);
     ~e100_impl(void);
 
     //the io interface
@@ -103,82 +80,49 @@ public:
     size_t get_max_recv_samps_per_packet(void) const;
 
 private:
-    //interface to ioctls and file descriptor
-    e100_iface::sptr _iface;
-
-    //ad9522 clock control
+    uhd::property_tree::sptr _tree;
+
+    //controllers
+    spi_core_100::sptr _fpga_spi_ctrl;
+    i2c_core_100::sptr _fpga_i2c_ctrl;
+    rx_frontend_core_200::sptr _rx_fe;
+    tx_frontend_core_200::sptr _tx_fe;
+    std::vector<rx_dsp_core_200::sptr> _rx_dsps;
+    tx_dsp_core_200::sptr _tx_dsp;
+    time64_core_200::sptr _time64;
     e100_clock_ctrl::sptr _clock_ctrl;
-
-    //ad9862 codec control
     e100_codec_ctrl::sptr _codec_ctrl;
+    e100_ctrl::sptr _fpga_ctrl;
+    uhd::i2c_iface::sptr _dev_i2c_iface;
+    uhd::spi_iface::sptr _aux_spi_iface;
 
-    //handle io stuff
+    //transports
     uhd::transport::zero_copy_if::sptr _data_transport;
-    UHD_PIMPL_DECL(io_impl) _io_impl;
-    size_t _recv_frame_size, _send_frame_size;
-    uhd::otw_type_t _send_otw_type, _recv_otw_type;
-    void io_init(void);
-    void handle_irq(void);
-    void handle_overrun(size_t);
-    void update_xport_channel_mapping(void);
-
-    //configuration shadows
-    uhd::clock_config_t _clock_config;
-
-    //device functions and settings
-    void get(const wax::obj &, wax::obj &);
-    void set(const wax::obj &, const wax::obj &);
-
-    //mboard functions and settings
-    void mboard_init(void);
-    void mboard_get(const wax::obj &, wax::obj &);
-    void mboard_set(const wax::obj &, const wax::obj &);
-    wax_obj_proxy::sptr _mboard_proxy;
-    uhd::usrp::subdev_spec_t _rx_subdev_spec, _tx_subdev_spec;
-
-    //xx dboard functions and settings
-    void dboard_init(void);
+
+    //dboard stuff
     uhd::usrp::dboard_manager::sptr _dboard_manager;
     uhd::usrp::dboard_iface::sptr _dboard_iface;
 
-    //rx dboard functions and settings
-    uhd::usrp::dboard_eeprom_t _rx_db_eeprom;
-    void rx_dboard_get(const wax::obj &, wax::obj &);
-    void rx_dboard_set(const wax::obj &, const wax::obj &);
-    wax_obj_proxy::sptr _rx_dboard_proxy;
-
-    //tx dboard functions and settings
-    uhd::usrp::dboard_eeprom_t _tx_db_eeprom, _gdb_eeprom;
-    void tx_dboard_get(const wax::obj &, wax::obj &);
-    void tx_dboard_set(const wax::obj &, const wax::obj &);
-    wax_obj_proxy::sptr _tx_dboard_proxy;
-
-    //methods and shadows for the dsps
-    UHD_PIMPL_DECL(dsp_impl) _dsp_impl;
-    void dsp_init(void);
-    void issue_ddc_stream_cmd(const uhd::stream_cmd_t &, size_t);
-
-    //properties interface for ddc
-    void ddc_get(const wax::obj &, wax::obj &, size_t);
-    void ddc_set(const wax::obj &, const wax::obj &, size_t);
-    uhd::dict<std::string, wax_obj_proxy::sptr> _rx_dsp_proxies;
-
-    //properties interface for duc
-    void duc_get(const wax::obj &, wax::obj &, size_t);
-    void duc_set(const wax::obj &, const wax::obj &, size_t);
-    uhd::dict<std::string, wax_obj_proxy::sptr> _tx_dsp_proxies;
-
-    //codec functions and settings
-    void codec_init(void);
-    void rx_codec_get(const wax::obj &, wax::obj &);
-    void rx_codec_set(const wax::obj &, const wax::obj &);
-    void tx_codec_get(const wax::obj &, wax::obj &);
-    void tx_codec_set(const wax::obj &, const wax::obj &);
-    wax_obj_proxy::sptr _rx_codec_proxy, _tx_codec_proxy;
-    
-    //clock control functions and settings
-    void init_clock_config(void);
-    void update_clock_config(void);
+    //handle io stuff
+    uhd::otw_type_t _rx_otw_type, _tx_otw_type;
+    UHD_PIMPL_DECL(io_impl) _io_impl;
+    void io_init(void);
+
+    //device properties interface
+    void get(const wax::obj &, wax::obj &val){
+        val = _tree; //entry point into property tree
+    }
+
+    double update_rx_codec_gain(const double); //sets A and B at once
+    void set_mb_eeprom(const uhd::usrp::mboard_eeprom_t &);
+    void set_db_eeprom(const std::string &, const uhd::usrp::dboard_eeprom_t &);
+    void update_tick_rate(const double rate);
+    void update_rx_samp_rate(const double rate);
+    void update_tx_samp_rate(const double rate);
+    void update_rx_subdev_spec(const uhd::usrp::subdev_spec_t &);
+    void update_tx_subdev_spec(const uhd::usrp::subdev_spec_t &);
+    void update_ref_source(const std::string &);
+
 };
 
 #endif /* INCLUDED_E100_IMPL_HPP */
diff --git a/host/lib/usrp/e100/e100_mmap_zero_copy.cpp b/host/lib/usrp/e100/e100_mmap_zero_copy.cpp
index 5370b7594..cdb7094f4 100644
--- a/host/lib/usrp/e100/e100_mmap_zero_copy.cpp
+++ b/host/lib/usrp/e100/e100_mmap_zero_copy.cpp
@@ -15,7 +15,7 @@
 // along with this program.  If not, see <http://www.gnu.org/licenses/>.
 //
 
-#include "e100_iface.hpp"
+#include "e100_ctrl.hpp"
 #include <uhd/transport/zero_copy.hpp>
 #include <uhd/utils/log.hpp>
 #include <uhd/exception.hpp>
@@ -104,7 +104,7 @@ private:
  **********************************************************************/
 class e100_mmap_zero_copy_impl : public zero_copy_if{
 public:
-    e100_mmap_zero_copy_impl(e100_iface::sptr iface):
+    e100_mmap_zero_copy_impl(e100_ctrl::sptr iface):
         _fd(iface->get_file_descriptor()), _recv_index(0), _send_index(0)
     {
         //get system sizes
@@ -264,6 +264,6 @@ private:
 /***********************************************************************
  * The zero copy interface make function
  **********************************************************************/
-zero_copy_if::sptr e100_make_mmap_zero_copy(e100_iface::sptr iface){
+zero_copy_if::sptr e100_make_mmap_zero_copy(e100_ctrl::sptr iface){
     return zero_copy_if::sptr(new e100_mmap_zero_copy_impl(iface));
 }
diff --git a/host/lib/usrp/e100/io_impl.cpp b/host/lib/usrp/e100/io_impl.cpp
index 65fb1f3db..52da8b2cd 100644
--- a/host/lib/usrp/e100/io_impl.cpp
+++ b/host/lib/usrp/e100/io_impl.cpp
@@ -22,8 +22,6 @@
 #include "e100_regs.hpp"
 #include <uhd/utils/msg.hpp>
 #include <uhd/utils/log.hpp>
-#include <uhd/usrp/dsp_utils.hpp>
-#include <uhd/usrp/dsp_props.hpp>
 #include <uhd/utils/thread_priority.hpp>
 #include <uhd/transport/bounded_buffer.hpp>
 #include <boost/bind.hpp>
@@ -47,11 +45,10 @@ using namespace uhd::transport;
  * - vrt packet handler states
  **********************************************************************/
 struct e100_impl::io_impl{
-    io_impl(zero_copy_if::sptr &xport):
-        data_transport(xport),
-        async_msg_fifo(100/*messages deep*/)
+    io_impl(zero_copy_if::sptr data_transport, const size_t recv_width):
+        data_transport(data_transport), async_msg_fifo(100/*messages deep*/)
     {
-        for (size_t i = 0; i < E100_NUM_RX_DSPS; i++){
+        for (size_t i = 0; i < recv_width; i++){
             typedef bounded_buffer<managed_recv_buffer::sptr> buffs_queue_type;
             _buffs_queue.push_back(new buffs_queue_type(data_transport->get_num_recv_frames()));
         }
@@ -65,6 +62,10 @@ struct e100_impl::io_impl{
         }
     }
 
+    double tick_rate; //set by update tick rate method
+    e100_ctrl::sptr iface; //so handle irq can peek and poke
+    void handle_irq(void);
+
     std::vector<bounded_buffer<managed_recv_buffer::sptr> *> _buffs_queue;
 
     //gets buffer, determines if its the requested index,
@@ -82,11 +83,11 @@ struct e100_impl::io_impl{
 
             //check the stream id to know which channel
             const boost::uint32_t *vrt_hdr = buff->cast<const boost::uint32_t *>();
-            const size_t rx_index = uhd::wtohx(vrt_hdr[1]) - E100_DSP_SID_BASE;
+            const size_t rx_index = uhd::wtohx(vrt_hdr[1]) - E100_RX_SID_BASE;
             if (rx_index == index) return buff; //got expected message
 
             //otherwise queue and try again
-            if (rx_index < E100_NUM_RX_DSPS) _buffs_queue[rx_index]->push_with_pop_on_full(buff);
+            if (rx_index < _buffs_queue.size()) _buffs_queue[rx_index]->push_with_pop_on_full(buff);
             else UHD_MSG(error) << "Got a data packet with known SID " << uhd::wtohx(vrt_hdr[1]) << std::endl;
         }
     }
@@ -98,13 +99,11 @@ struct e100_impl::io_impl{
     //state management for the vrt packet handler code
     sph::recv_packet_handler recv_handler;
     sph::send_packet_handler send_handler;
-    bool continuous_streaming;
 
     //a pirate's life is the life for me!
     void recv_pirate_loop(
         boost::barrier &spawn_barrier,
-        const boost::function<void(void)> &handle,
-        e100_iface::sptr //keep a sptr to iface which shares gpio147
+        spi_iface::sptr //keep a sptr to iface which shares gpio147
     ){
         spawn_barrier.wait();
 
@@ -120,7 +119,7 @@ struct e100_impl::io_impl{
             pfd.fd = fd;
             pfd.events = POLLPRI | POLLERR;
             ssize_t ret = ::poll(&pfd, 1, 100/*ms*/);
-            if (ret > 0) handle();
+            if (ret > 0) this->handle_irq();
         }
 
         //cleanup before thread exit
@@ -130,38 +129,9 @@ struct e100_impl::io_impl{
     boost::thread_group recv_pirate_crew;
 };
 
-/***********************************************************************
- * Helper Functions
- **********************************************************************/
-void e100_impl::io_init(void){
-
-    //setup before the registers (transport called to calculate max spp)
-    _io_impl = UHD_PIMPL_MAKE(io_impl, (_data_transport));
-
-    //clear state machines
-    _iface->poke32(E100_REG_CLEAR_RX, 0);
-    _iface->poke32(E100_REG_CLEAR_TX, 0);
-
-    //prepare the async msg buffer for incoming messages
-    _iface->poke32(E100_REG_SR_ERR_CTRL, 1 << 0); //clear
-    while ((_iface->peek32(E100_REG_RB_ERR_STATUS) & (1 << 2)) == 0){} //wait for idle
-    _iface->poke32(E100_REG_SR_ERR_CTRL, 1 << 1); //start
-
-    //spawn a pirate, yarrr!
-    boost::barrier spawn_barrier(2);
-    boost::function<void(void)> handle_irq_cb = boost::bind(&e100_impl::handle_irq, this);
-    _io_impl->recv_pirate_crew.create_thread(boost::bind(
-        &e100_impl::io_impl::recv_pirate_loop, _io_impl.get(),
-        boost::ref(spawn_barrier), handle_irq_cb, _iface
-    ));
-    spawn_barrier.wait();
-    //update mapping here since it didnt b4 when io init not called first
-    update_xport_channel_mapping();
-}
-
-void e100_impl::handle_irq(void){
+void e100_impl::io_impl::handle_irq(void){
     //check the status of the async msg buffer
-    const boost::uint32_t status = _iface->peek32(E100_REG_RB_ERR_STATUS);
+    const boost::uint32_t status = iface->peek32(E100_REG_RB_ERR_STATUS);
     if ((status & 0x3) == 0) return; //not done or error
     //std::cout << boost::format("status: 0x%x") % status << std::endl;
 
@@ -169,9 +139,9 @@ void e100_impl::handle_irq(void){
     usrp_e_ctl32 data;
     data.offset = E100_REG_ERR_BUFF;
     data.count = status >> 16;
-    //FIXME ioctl reads words32 incorrectly _iface->ioctl(USRP_E_READ_CTL32, &data);
+    //FIXME ioctl reads words32 incorrectly _fpga_ctrl->ioctl(USRP_E_READ_CTL32, &data);
     for (size_t i = 0; i < data.count; i++){
-        data.buf[i] = _iface->peek32(E100_REG_ERR_BUFF + i*sizeof(boost::uint32_t));
+        data.buf[i] = iface->peek32(E100_REG_ERR_BUFF + i*sizeof(boost::uint32_t));
         //std::cout << boost::format("    buff[%u] = 0x%08x\n") % i % data.buf[i];
     }
 
@@ -185,19 +155,19 @@ void e100_impl::handle_irq(void){
     }
 
     //handle a tx async report message
-    if (if_packet_info.sid == E100_ASYNC_SID and if_packet_info.packet_type != vrt::if_packet_info_t::PACKET_TYPE_DATA){
+    if (if_packet_info.sid == E100_TX_ASYNC_SID and if_packet_info.packet_type != vrt::if_packet_info_t::PACKET_TYPE_DATA){
 
         //fill in the async metadata
         async_metadata_t metadata;
         metadata.channel = 0;
         metadata.has_time_spec = if_packet_info.has_tsi and if_packet_info.has_tsf;
         metadata.time_spec = time_spec_t(
-            time_t(if_packet_info.tsi), long(if_packet_info.tsf), _clock_ctrl->get_fpga_clock_rate()
+            time_t(if_packet_info.tsi), long(if_packet_info.tsf), tick_rate
         );
         metadata.event_code = async_metadata_t::event_code_t(sph::get_context_code(data.buf, if_packet_info));
 
         //push the message onto the queue
-        _io_impl->async_msg_fifo.push_with_pop_on_full(metadata);
+        async_msg_fifo.push_with_pop_on_full(metadata);
 
         //print some fastpath messages
         if (metadata.event_code &
@@ -212,57 +182,120 @@ void e100_impl::handle_irq(void){
 
     //prepare for the next round
     prepare:
-    _iface->poke32(E100_REG_SR_ERR_CTRL, 1 << 0); //clear
-    while ((_iface->peek32(E100_REG_RB_ERR_STATUS) & (1 << 2)) == 0){} //wait for idle
-    _iface->poke32(E100_REG_SR_ERR_CTRL, 1 << 1); //start
+    iface->poke32(E100_REG_SR_ERR_CTRL, 1 << 0); //clear
+    while ((iface->peek32(E100_REG_RB_ERR_STATUS) & (1 << 2)) == 0){} //wait for idle
+    iface->poke32(E100_REG_SR_ERR_CTRL, 1 << 1); //start
 }
 
-void e100_impl::update_xport_channel_mapping(void){
-    if (_io_impl.get() == NULL) return; //not inited yet
+/***********************************************************************
+ * Helper Functions
+ **********************************************************************/
+void e100_impl::io_init(void){
 
-    //set all of the relevant properties on the handler
-    boost::mutex::scoped_lock recv_lock = _io_impl->recv_handler.get_scoped_lock();
-    _io_impl->recv_handler.resize(_rx_subdev_spec.size());
+    //setup rx otw type
+    _rx_otw_type.width = 16;
+    _rx_otw_type.shift = 0;
+    _rx_otw_type.byteorder = uhd::otw_type_t::BO_LITTLE_ENDIAN;
+
+    //setup tx otw type
+    _tx_otw_type.width = 16;
+    _tx_otw_type.shift = 0;
+    _tx_otw_type.byteorder = uhd::otw_type_t::BO_LITTLE_ENDIAN;
+
+    //create new io impl
+    _io_impl = UHD_PIMPL_MAKE(io_impl, (_data_transport, _rx_dsps.size()));
+    _io_impl->iface = _fpga_ctrl;
+
+    //clear state machines
+    _fpga_ctrl->poke32(E100_REG_CLEAR_RX, 0);
+    _fpga_ctrl->poke32(E100_REG_CLEAR_TX, 0);
+
+    //prepare the async msg buffer for incoming messages
+    _fpga_ctrl->poke32(E100_REG_SR_ERR_CTRL, 1 << 0); //clear
+    while ((_fpga_ctrl->peek32(E100_REG_RB_ERR_STATUS) & (1 << 2)) == 0){} //wait for idle
+    _fpga_ctrl->poke32(E100_REG_SR_ERR_CTRL, 1 << 1); //start
+
+    //spawn a pirate, yarrr!
+    boost::barrier spawn_barrier(2);
+    _io_impl->recv_pirate_crew.create_thread(boost::bind(
+        &e100_impl::io_impl::recv_pirate_loop, _io_impl.get(),
+        boost::ref(spawn_barrier), _aux_spi_iface
+    ));
+    spawn_barrier.wait();
+
+    //init some handler stuff
     _io_impl->recv_handler.set_vrt_unpacker(&vrt::if_hdr_unpack_le);
-    _io_impl->recv_handler.set_tick_rate(_clock_ctrl->get_fpga_clock_rate());
-    //FIXME assumes homogeneous rates across all dsp
-    _io_impl->recv_handler.set_samp_rate(_rx_dsp_proxies[_rx_dsp_proxies.keys().at(0)]->get_link()[DSP_PROP_HOST_RATE].as<double>());
-    for (size_t chan = 0; chan < _io_impl->recv_handler.size(); chan++){
-        _io_impl->recv_handler.set_xport_chan_get_buff(chan, boost::bind(
-            &e100_impl::io_impl::get_recv_buff, _io_impl.get(), chan, _1
-        ));
-        _io_impl->recv_handler.set_overflow_handler(chan, boost::bind(
-            &e100_impl::handle_overrun, this, chan
-        ));
-    }
-    _io_impl->recv_handler.set_converter(_recv_otw_type);
+    _io_impl->recv_handler.set_converter(_rx_otw_type);
+    _io_impl->send_handler.set_vrt_packer(&vrt::if_hdr_pack_le);
+    _io_impl->send_handler.set_converter(_tx_otw_type);
+    _io_impl->send_handler.set_max_samples_per_packet(get_max_send_samps_per_packet());
+}
 
-    //set all of the relevant properties on the handler
+void e100_impl::update_tick_rate(const double rate){
+    _io_impl->tick_rate = rate;
+    boost::mutex::scoped_lock recv_lock = _io_impl->recv_handler.get_scoped_lock();
+    _io_impl->recv_handler.set_tick_rate(rate);
     boost::mutex::scoped_lock send_lock = _io_impl->send_handler.get_scoped_lock();
-    _io_impl->send_handler.resize(_tx_subdev_spec.size());
-    _io_impl->send_handler.set_vrt_packer(&vrt::if_hdr_pack_le);
-    _io_impl->send_handler.set_tick_rate(_clock_ctrl->get_fpga_clock_rate());
-    //FIXME assumes homogeneous rates across all dsp
-    _io_impl->send_handler.set_samp_rate(_tx_dsp_proxies[_tx_dsp_proxies.keys().at(0)]->get_link()[DSP_PROP_HOST_RATE].as<double>());
-    for (size_t chan = 0; chan < _io_impl->send_handler.size(); chan++){
-        _io_impl->send_handler.set_xport_chan_get_buff(chan, boost::bind(
-            &uhd::transport::zero_copy_if::get_send_buff, _io_impl->data_transport, _1
+    _io_impl->send_handler.set_tick_rate(rate);
+}
+
+void e100_impl::update_rx_samp_rate(const double rate){
+    boost::mutex::scoped_lock recv_lock = _io_impl->recv_handler.get_scoped_lock();
+    _io_impl->recv_handler.set_samp_rate(rate);
+}
+
+void e100_impl::update_tx_samp_rate(const double rate){
+    boost::mutex::scoped_lock send_lock = _io_impl->send_handler.get_scoped_lock();
+    _io_impl->send_handler.set_samp_rate(rate);
+}
+
+void e100_impl::update_rx_subdev_spec(const uhd::usrp::subdev_spec_t &spec){
+    boost::mutex::scoped_lock recv_lock = _io_impl->recv_handler.get_scoped_lock();
+    property_tree::path_type root = "/mboards/0/dboards";
+
+    //sanity checking
+    if (spec.size() == 0) throw uhd::value_error("rx subdev spec cant be empty");
+    if (spec.size() > _rx_dsps.size()) throw uhd::value_error("rx subdev spec too long");
+
+    //setup mux for this spec
+    for (size_t i = 0; i < spec.size(); i++){
+        //ASSUME that we dont swap the rx fe mux...
+        const std::string conn = _tree->access<std::string>(root / spec[i].db_name / "rx_frontends" / spec[i].sd_name / "connection").get();
+        _rx_dsps[i]->set_mux(conn);
+    }
+
+    //resize for the new occupancy
+    _io_impl->recv_handler.resize(spec.size());
+
+    //bind new callbacks for the handler
+    for (size_t i = 0; i < _io_impl->recv_handler.size(); i++){
+        _rx_dsps[i]->set_nsamps_per_packet(get_max_recv_samps_per_packet()); //seems to be a good place to set this
+        _io_impl->recv_handler.set_xport_chan_get_buff(i, boost::bind(
+            &e100_impl::io_impl::get_recv_buff, _io_impl.get(), i, _1
         ));
+        _io_impl->recv_handler.set_overflow_handler(i, boost::bind(&rx_dsp_core_200::handle_overflow, _rx_dsps[i]));
     }
-    _io_impl->send_handler.set_converter(_send_otw_type);
-    _io_impl->send_handler.set_max_samples_per_packet(get_max_send_samps_per_packet());
 }
 
-void e100_impl::issue_ddc_stream_cmd(const stream_cmd_t &stream_cmd, const size_t index){
-    _io_impl->continuous_streaming = (stream_cmd.stream_mode == stream_cmd_t::STREAM_MODE_START_CONTINUOUS);
-    _iface->poke32(E100_REG_RX_CTRL_STREAM_CMD(index), dsp_type1::calc_stream_cmd_word(stream_cmd));
-    _iface->poke32(E100_REG_RX_CTRL_TIME_SECS(index),  boost::uint32_t(stream_cmd.time_spec.get_full_secs()));
-    _iface->poke32(E100_REG_RX_CTRL_TIME_TICKS(index), stream_cmd.time_spec.get_tick_count(_clock_ctrl->get_fpga_clock_rate()));
-}
+void e100_impl::update_tx_subdev_spec(const uhd::usrp::subdev_spec_t &spec){
+    boost::mutex::scoped_lock send_lock = _io_impl->send_handler.get_scoped_lock();
+    property_tree::path_type root = "/mboards/0/dboards";
 
-void e100_impl::handle_overrun(const size_t index){
-    if (_io_impl->continuous_streaming){
-        this->issue_ddc_stream_cmd(stream_cmd_t::STREAM_MODE_START_CONTINUOUS, index);
+    //sanity checking
+    if (spec.size() != 1) throw uhd::value_error("tx subdev spec has to be size 1");
+
+    //set the mux for this spec
+    const std::string conn = _tree->access<std::string>(root / spec[0].db_name / "tx_frontends" / spec[0].sd_name / "connection").get();
+    _tx_fe->set_mux(conn);
+
+    //resize for the new occupancy
+    _io_impl->send_handler.resize(spec.size());
+
+    //bind new callbacks for the handler
+    for (size_t i = 0; i < _io_impl->send_handler.size(); i++){
+        _io_impl->send_handler.set_xport_chan_get_buff(i, boost::bind(
+            &zero_copy_if::get_send_buff, _data_transport, _1
+        ));
     }
 }
 
@@ -274,8 +307,8 @@ size_t e100_impl::get_max_send_samps_per_packet(void) const{
         + vrt::max_if_hdr_words32*sizeof(boost::uint32_t)
         - sizeof(vrt::if_packet_info_t().cid) //no class id ever used
     ;
-    size_t bpp = _send_frame_size - hdr_size;
-    return bpp/_send_otw_type.get_sample_size();
+    size_t bpp = _data_transport->get_send_frame_size() - hdr_size;
+    return bpp/_tx_otw_type.get_sample_size();
 }
 
 size_t e100_impl::send(
@@ -299,8 +332,8 @@ size_t e100_impl::get_max_recv_samps_per_packet(void) const{
         + sizeof(vrt::if_packet_info_t().tlr) //forced to have trailer
         - sizeof(vrt::if_packet_info_t().cid) //no class id ever used
     ;
-    size_t bpp = _recv_frame_size - hdr_size;
-    return bpp/_recv_otw_type.get_sample_size();
+    size_t bpp = _data_transport->get_recv_frame_size() - hdr_size;
+    return bpp/_rx_otw_type.get_sample_size();
 }
 
 size_t e100_impl::recv(