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authorMartin Braun <martin.braun@ettus.com>2021-07-06 17:42:54 +0200
committerAaron Rossetto <aaron.rossetto@ni.com>2021-07-20 07:21:18 -0500
commit4185493a016eb69e2b78d6fd20101ace7c44064f (patch)
tree1ddca3ff47a91fddc28e30e41ae0032c9f452dcb /host/lib
parent0dc4d06450f9a39c780fc91ffb73317d606c5098 (diff)
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dbsrx: Fix issue with loop variable
In 26cc208, we accidentally added an `auto` into a loop, making the loop variable's scope local. However, this variable lives outside this for loop.
Diffstat (limited to 'host/lib')
-rw-r--r--host/lib/usrp/dboard/db_dbsrx.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/host/lib/usrp/dboard/db_dbsrx.cpp b/host/lib/usrp/dboard/db_dbsrx.cpp
index 09690a3d1..ef8554f86 100644
--- a/host/lib/usrp/dboard/db_dbsrx.cpp
+++ b/host/lib/usrp/dboard/db_dbsrx.cpp
@@ -272,7 +272,8 @@ double dbsrx::set_lo_freq(double target_freq)
std::vector<double> clock_rates =
this->get_iface()->get_clock_rates(dboard_iface::UNIT_RX);
const double max_clock_rate = uhd::sorted(clock_rates).back();
- for (auto ref_clock : uhd::reversed(uhd::sorted(clock_rates))) {
+ for (auto ref_clock_it : uhd::reversed(uhd::sorted(clock_rates))) {
+ ref_clock = ref_clock_it;
// USRP1 feeds the DBSRX clock from a FPGA GPIO line.
// make sure that this clock does not exceed rate limit.
if (this->get_iface()->get_special_props().soft_clock_divider) {
@@ -298,10 +299,10 @@ double dbsrx::set_lo_freq(double target_freq)
continue;
// choose R
- for (auto r = 0; r <= 6; r += 1) {
+ for (r = 0; r <= 6; r += 1) {
// compute divider from setting
R = 1 << (r + 1);
- UHD_LOGGER_TRACE("DBSRX") << boost::format("DBSRX R:%d\n") % R;
+ UHD_LOGGER_TRACE("DBSRX") << "DBSRX R:" << R << "\n";
// compute PFD compare frequency = ref_clock/R
pfd_freq = ref_clock / R;