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| author | michael-west <michael.west@ettus.com> | 2015-04-22 17:55:43 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2015-04-23 09:48:37 -0700 |
| commit | 4e8f0817001d14a9eb2b85f042f185b0c802b6ed (patch) | |
| tree | 93e125d6d2280443f54a440e58e0e8afb1cc2f82 /host/lib/usrp_clock | |
| parent | 63ba4f76a76d9b04d8642abc71f002cb23a8759d (diff) | |
| download | uhd-4e8f0817001d14a9eb2b85f042f185b0c802b6ed.tar.gz uhd-4e8f0817001d14a9eb2b85f042f185b0c802b6ed.tar.bz2 uhd-4e8f0817001d14a9eb2b85f042f185b0c802b6ed.zip | |
USRP2: Separate FPGA compat numbers for USRP2 and N200.
Diffstat (limited to 'host/lib/usrp_clock')
0 files changed, 0 insertions, 0 deletions