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| author | Jonathon Pendlum <jonathon.pendlum@ettus.com> | 2015-04-29 14:00:40 -0700 |
|---|---|---|
| committer | Jonathon Pendlum <jonathon.pendlum@ettus.com> | 2015-04-29 14:00:40 -0700 |
| commit | bafd5a574df850ebbc46cf5ffb10222460386157 (patch) | |
| tree | 8863e9800daa648432d98f759c58bf145f74c3f6 /host/lib/usrp | |
| parent | 65428849a51a9c6d74dff1f935b57d1ba904e5a6 (diff) | |
| download | uhd-bafd5a574df850ebbc46cf5ffb10222460386157.tar.gz uhd-bafd5a574df850ebbc46cf5ffb10222460386157.tar.bz2 uhd-bafd5a574df850ebbc46cf5ffb10222460386157.zip | |
e300: Adjusted minimum frequency to account for MIMO mode
- In MIMO mode, tick rate will be 1/2 the interface rate
Diffstat (limited to 'host/lib/usrp')
| -rw-r--r-- | host/lib/usrp/e300/e300_impl.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/host/lib/usrp/e300/e300_impl.cpp b/host/lib/usrp/e300/e300_impl.cpp index 5ec2f5b2a..76e0bc2e2 100644 --- a/host/lib/usrp/e300/e300_impl.cpp +++ b/host/lib/usrp/e300/e300_impl.cpp @@ -646,7 +646,7 @@ void e300_impl::_enforce_tick_rate_limits( } // Minimum rate restriction due to MMCM used in capture interface to AD9361. // Xilinx Artix-7 FPGA MMCM minimum input frequency is 10 MHz. - const double min_tick_rate = uhd::usrp::e300::MIN_TICK_RATE; + const double min_tick_rate = uhd::usrp::e300::MIN_TICK_RATE / ((chan_count <= 1) ? 1 : 2); if (tick_rate - min_tick_rate < 0.0) { throw uhd::value_error(boost::str( |