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authorLane Kolbly <lane.kolbly@ni.com>2021-10-18 16:45:46 -0500
committerAaron Rossetto <aaron.rossetto@ni.com>2021-11-03 06:04:19 -0700
commitc23dc3b0122a46353810d1ccbe98c08b080850e8 (patch)
treed89ab38b0565190737bd5e16b65c601f4df58fd6 /host/lib/usrp/x400/x400_radio_control.hpp
parent3162b92bedda20f5b376137f5e918ebe07406fbb (diff)
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host: x4xx: Implement GPIO API
This implements the GPIO API for X410 through get_gpio_attr and set_gpio_attr. In ATR mode, which channel's ATR state is chosen by the set_gpio_src call, setting e.g. DB0_RF0 for channel 0 or DB0_RF1 for channel 1. In manual mode, all 24 bits (for both ports) are set in a single register write. Although the front panel of the device has two ports, labelled GPIO0 and GPIO1, this API exposes them as though they were a single 24-bit GPIO port.
Diffstat (limited to 'host/lib/usrp/x400/x400_radio_control.hpp')
-rw-r--r--host/lib/usrp/x400/x400_radio_control.hpp10
1 files changed, 10 insertions, 0 deletions
diff --git a/host/lib/usrp/x400/x400_radio_control.hpp b/host/lib/usrp/x400/x400_radio_control.hpp
index 65b37cc2b..8848926c7 100644
--- a/host/lib/usrp/x400/x400_radio_control.hpp
+++ b/host/lib/usrp/x400/x400_radio_control.hpp
@@ -23,6 +23,8 @@
#include <mutex>
#include <string>
#include <vector>
+#include <uhdlib/usrp/cores/gpio_atr_3000.hpp>
+#include "x400_gpio_control.hpp"
namespace uhd { namespace rfnoc {
@@ -55,6 +57,12 @@ public:
uhd::eeprom_map_t get_db_eeprom() override;
+ // GPIO methods
+ std::vector<std::string> get_gpio_banks() const override;
+ uint32_t get_gpio_attr(const std::string& bank, const std::string& attr) override;
+ void set_gpio_attr(
+ const std::string& bank, const std::string& attr, const uint32_t value) override;
+
// Shim calls for every method in rf_control_core
double set_rate(const double rate) override;
std::string get_tx_antenna(const size_t chan) const override;
@@ -171,6 +179,8 @@ private:
uhd::features::adc_self_calibration_iface::sptr _adc_self_calibration;
+ x400::gpio_control::sptr _gpios;
+
class fpga_onload : public uhd::features::fpga_load_notification_iface
{
public: