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authormichael-west <michael.west@ettus.com>2017-08-16 17:15:06 -0700
committerMartin Braun <martin.braun@ettus.com>2017-12-20 15:05:46 -0800
commitd1aebc9c23817dbaed580698edc11acd8763f883 (patch)
treeb9033af11fe3b6bf5ae4f8ccdac75e45f4b5b18b /host/lib/usrp/x300/x300_dac_ctrl.cpp
parentf249f1922a7484d870680db4a2faf2129e99b267 (diff)
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X300: Add retry to DAC synchronization
Reviewed-by: Martin Braun <martin.braun@ettus.com> Reviewed-by: Ashish Chaudhari <ashish.chaudhari@ettus.com>
Diffstat (limited to 'host/lib/usrp/x300/x300_dac_ctrl.cpp')
-rw-r--r--host/lib/usrp/x300/x300_dac_ctrl.cpp50
1 files changed, 41 insertions, 9 deletions
diff --git a/host/lib/usrp/x300/x300_dac_ctrl.cpp b/host/lib/usrp/x300/x300_dac_ctrl.cpp
index 51b93662c..35883fa50 100644
--- a/host/lib/usrp/x300/x300_dac_ctrl.cpp
+++ b/host/lib/usrp/x300/x300_dac_ctrl.cpp
@@ -79,6 +79,33 @@ public:
_sleep_mode(false);
}
+ void sync()
+ {
+ try {
+ // Just return if PLL is locked and backend is synchronized
+ _check_pll();
+ _check_dac_sync();
+ return;
+ } catch (...) {}
+
+ std::string err_str;
+
+ // Try 3 times to sync before giving up
+ for (size_t retries = 0; retries < 3; retries++)
+ {
+ try {
+ _sleep_mode(true);
+ _init();
+ _backend_sync();
+ _sleep_mode(false);
+ return;
+ } catch (const uhd::runtime_error &e) {
+ err_str = e.what();
+ }
+ }
+ throw uhd::runtime_error(err_str);
+ }
+
void verify_sync()
{
_check_pll();
@@ -147,7 +174,6 @@ public:
void _backend_sync(void)
{
write_ad9146_reg(0x10, 0x40); // Disable SYNC mode to reset state machines.
- write_ad9146_reg(0x06, 0x30); // Clear Sync event flags
//SYNC Settings:
//- SYNC = Enabled
@@ -175,13 +201,10 @@ public:
write_ad9146_reg(0x17, 0x05);
// We are requesting a soft FIFO align just to put the FIFO
- // in a known state. The FRAME will actually do sync the
+ // in a known state. The FRAME will actually sync the
// FIFO correctly when a stream is created
write_ad9146_reg(0x18, 0x02); // Request soft FIFO align
write_ad9146_reg(0x18, 0x00); // (See above)
-
- //Verify the FIFO thermometer
- _check_frontend_sync(false); //FIFO sanity check
}
//
@@ -189,6 +212,9 @@ public:
//
void _check_pll()
{
+ //Clear PLL event flags
+ write_ad9146_reg(0x06, 0xC0);
+
// Verify PLL is Locked. 1 sec timeout.
// NOTE: Data sheet inconsistent about which pins give PLL lock status. FIXME!
const time_spec_t exit_time = time_spec_t::get_system_time() + time_spec_t(1.0);
@@ -198,7 +224,7 @@ public:
const size_t reg_6 = read_ad9146_reg(0x06); // Event Flags (Expect bit 7 = 0 and bit 6 = 1)
if ((((reg_e >> 7) & 0x1) == 0x1) && (((reg_6 >> 6) & 0x3) == 0x1))
break;
- if (exit_time < time_spec_t::get_system_time())
+ if (time_spec_t::get_system_time() > exit_time)
throw uhd::runtime_error("x300_dac_ctrl: timeout waiting for DAC PLL to lock");
if (reg_6 & (1 << 7)) // Lock lost?
write_ad9146_reg(0x06, 0xC0); // Clear PLL event flags
@@ -211,6 +237,10 @@ public:
//
void _check_dac_sync()
{
+ // Clear Sync event flags
+ write_ad9146_reg(0x06, 0x30);
+ write_ad9146_reg(0x12, 0x00);
+
const time_spec_t exit_time = time_spec_t::get_system_time() + time_spec_t(1.0);
while (true)
{
@@ -219,13 +249,15 @@ public:
const size_t reg_6 = read_ad9146_reg(0x06); // Event Flags (Expect bit 5 = 0 and bit 4 = 1)
if ((((reg_12 >> 6) & 0x3) == 0x1) && (((reg_6 >> 4) & 0x3) == 0x1))
break;
- if (exit_time < time_spec_t::get_system_time())
+ if (time_spec_t::get_system_time() > exit_time)
throw uhd::runtime_error("x300_dac_ctrl: timeout waiting for backend synchronization");
if (reg_6 & (1 << 5))
write_ad9146_reg(0x06, 0x30); // Clear Sync event flags
#ifdef X300_DAC_RETRY_BACKEND_SYNC
- if (reg_12 & (1 << 7)) // Sync acquired and lost?
+ if (reg_12 & (1 << 7)) { // Sync acquired and lost?
write_ad9146_reg(0x10, 0xC7); // Enable SYNC mode. Falling edge sync. Averaging set to 128.
+ write_ad9146_reg(0x12, 0x00); // Clear Sync event flags
+ }
#endif
}
}
@@ -238,7 +270,7 @@ public:
// Register 0x19 has a thermometer indicator of the FIFO depth
const size_t reg_19 = read_ad9146_reg(0x19);
if ((reg_19 & 0xFF) != 0xF) {
- std::string msg((boost::format("x300_dac_ctrl: front-end sync failed. unexpected FIFO depth [0x%x]\n") % (reg_19 & 0xFF)).str());
+ std::string msg((boost::format("x300_dac_ctrl: front-end sync failed. unexpected FIFO depth [0x%x]") % (reg_19 & 0xFF)).str());
if (failure_is_fatal) {
throw uhd::runtime_error(msg);
} else {