Merge branch 'master' into next

Conflicts:
	fpga/usrp2/top/u2plus/Makefile.N200

10 files changed, 64 insertions, 29 deletions

diff --git a/host/lib/usrp/usrp_e100/CMakeLists.txt b/host/lib/usrp/usrp_e100/CMakeLists.txt
index acbac177e..d0e20a3d8 100644
--- a/host/lib/usrp/usrp_e100/CMakeLists.txt
+++ b/host/lib/usrp/usrp_e100/CMakeLists.txt
@@ -22,11 +22,7 @@
 ########################################################################
 # Conditionally configure the USRP-E100 support
 ########################################################################
-IF(CMAKE_SYSTEM_NAME STREQUAL "Linux")
-    SET(LINUX_TARGET TRUE)
-ENDIF(CMAKE_SYSTEM_NAME STREQUAL "Linux")
-
-LIBUHD_REGISTER_COMPONENT("USRP-E100" ENABLE_USRP_E100 OFF "ENABLE_LIBUHD;LINUX_TARGET" OFF)
+LIBUHD_REGISTER_COMPONENT("USRP-E100" ENABLE_USRP_E100 OFF "ENABLE_LIBUHD;LINUX" OFF)
 
 IF(ENABLE_USRP_E100)
     INCLUDE_DIRECTORIES(${CMAKE_CURRENT_SOURCE_DIR}/include)
diff --git a/host/lib/usrp/usrp_e100/clock_ctrl.cpp b/host/lib/usrp/usrp_e100/clock_ctrl.cpp
index bb6fb7e3b..1ac2b804c 100644
--- a/host/lib/usrp/usrp_e100/clock_ctrl.cpp
+++ b/host/lib/usrp/usrp_e100/clock_ctrl.cpp
@@ -287,6 +287,10 @@ public:
         if (_out_rate == rate) return;
         if (rate == 61.44e6) set_clock_settings_with_external_vcxo(rate);
         else                 set_clock_settings_with_internal_vco(rate);
+        //clock rate changed! update dboard clocks and FPGA ticks per second
+        set_rx_dboard_clock_rate(rate);
+        set_tx_dboard_clock_rate(rate);
+        _iface->poke32(UE_REG_TIME64_TPS, boost::uint32_t(get_fpga_clock_rate()));
     }
 
     double get_fpga_clock_rate(void){
@@ -302,7 +306,7 @@ public:
         _ad9522_regs.out4_cmos_configuration = (enb)?
             ad9522_regs_t::OUT4_CMOS_CONFIGURATION_A_ON :
             ad9522_regs_t::OUT4_CMOS_CONFIGURATION_OFF;
-        this->send_reg(0x0F0);
+        this->send_reg(0x0F4);
         this->latch_regs();
     }
 
@@ -327,6 +331,7 @@ public:
 
     void set_rx_dboard_clock_rate(double rate){
         assert_has(get_rx_dboard_clock_rates(), rate, "rx dboard clock rate");
+        _rx_clock_rate = rate;
         size_t divider = size_t(this->_chan_rate/rate);
         //set the divider registers
         set_clock_divider(divider,
@@ -339,6 +344,10 @@ public:
         this->latch_regs();
     }
 
+    double get_rx_clock_rate(void){
+        return _rx_clock_rate;
+    }
+
     /***********************************************************************
      * TX Dboard Clock Control (output 6, divider 2)
      **********************************************************************/
@@ -357,6 +366,7 @@ public:
 
     void set_tx_dboard_clock_rate(double rate){
         assert_has(get_tx_dboard_clock_rates(), rate, "tx dboard clock rate");
+        _tx_clock_rate = rate;
         size_t divider = size_t(this->_chan_rate/rate);
         //set the divider registers
         set_clock_divider(divider,
@@ -368,7 +378,11 @@ public:
         this->send_reg(0x197);
         this->latch_regs();
     }
-    
+
+    double get_tx_clock_rate(void){
+        return _tx_clock_rate;
+    }
+
     /***********************************************************************
      * Clock reference control
      **********************************************************************/
@@ -400,6 +414,7 @@ private:
     ad9522_regs_t _ad9522_regs;
     double _out_rate; //rate at the fpga and codec
     double _chan_rate; //rate before final dividers
+    double _rx_clock_rate, _tx_clock_rate;
 
     void latch_regs(void){
         _ad9522_regs.io_update = 1;
diff --git a/host/lib/usrp/usrp_e100/clock_ctrl.hpp b/host/lib/usrp/usrp_e100/clock_ctrl.hpp
index 1f9960ce4..507f914f3 100644
--- a/host/lib/usrp/usrp_e100/clock_ctrl.hpp
+++ b/host/lib/usrp/usrp_e100/clock_ctrl.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright 2010 Ettus Research LLC
+// Copyright 2010-2011 Ettus Research LLC
 //
 // This program is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published by
@@ -79,6 +79,18 @@ public:
     virtual void set_tx_dboard_clock_rate(double rate) = 0;
 
     /*!
+     * Get the current rx dboard clock rate.
+     * \return the clock rate in Hz
+     */
+    virtual double get_rx_clock_rate(void) = 0;
+
+    /*!
+     * Get the current tx dboard clock rate.
+     * \return the clock rate in Hz
+     */
+    virtual double get_tx_clock_rate(void) = 0;
+
+    /*!
      * Enable/disable the rx dboard clock.
      * \param enb true to enable
      */
diff --git a/host/lib/usrp/usrp_e100/dboard_iface.cpp b/host/lib/usrp/usrp_e100/dboard_iface.cpp
index 4ee354486..61b5a1c92 100644
--- a/host/lib/usrp/usrp_e100/dboard_iface.cpp
+++ b/host/lib/usrp/usrp_e100/dboard_iface.cpp
@@ -97,7 +97,6 @@ private:
     usrp_e100_iface::sptr _iface;
     usrp_e100_clock_ctrl::sptr _clock;
     usrp_e100_codec_ctrl::sptr _codec;
-    uhd::dict<unit_t, double> _clock_rates;
 };
 
 /***********************************************************************
@@ -115,7 +114,6 @@ dboard_iface::sptr make_usrp_e100_dboard_iface(
  * Clock Rates
  **********************************************************************/
 void usrp_e100_dboard_iface::set_clock_rate(unit_t unit, double rate){
-    _clock_rates[unit] = rate;
     switch(unit){
     case UNIT_RX: return _clock->set_rx_dboard_clock_rate(rate);
     case UNIT_TX: return _clock->set_tx_dboard_clock_rate(rate);
@@ -131,7 +129,11 @@ std::vector<double> usrp_e100_dboard_iface::get_clock_rates(unit_t unit){
 }
 
 double usrp_e100_dboard_iface::get_clock_rate(unit_t unit){
-    return _clock_rates[unit];
+    switch(unit){
+    case UNIT_RX: return _clock->get_rx_clock_rate();
+    case UNIT_TX: return _clock->get_tx_clock_rate();
+    }
+    UHD_THROW_INVALID_CODE_PATH();
 }
 
 void usrp_e100_dboard_iface::set_clock_enabled(unit_t unit, bool enb){
diff --git a/host/lib/usrp/usrp_e100/io_impl.cpp b/host/lib/usrp/usrp_e100/io_impl.cpp
index fc6aaeaee..cbab5a761 100644
--- a/host/lib/usrp/usrp_e100/io_impl.cpp
+++ b/host/lib/usrp/usrp_e100/io_impl.cpp
@@ -23,7 +23,8 @@
 #include "../../transport/vrt_packet_handler.hpp"
 #include <boost/bind.hpp>
 #include <boost/format.hpp>
-#include <boost/thread.hpp>
+#include <boost/thread/thread.hpp>
+#include <boost/thread/barrier.hpp>
 #include <iostream>
 
 using namespace uhd;
@@ -93,7 +94,7 @@ struct usrp_e100_impl::io_impl{
     bool continuous_streaming;
 
     //a pirate's life is the life for me!
-    void recv_pirate_loop(usrp_e100_clock_ctrl::sptr);
+    void recv_pirate_loop(boost::barrier &, usrp_e100_clock_ctrl::sptr);
     bounded_buffer<managed_recv_buffer::sptr> recv_pirate_booty;
     bounded_buffer<async_metadata_t> async_msg_fifo;
     boost::thread_group recv_pirate_crew;
@@ -105,8 +106,10 @@ struct usrp_e100_impl::io_impl{
  * - while raiding, loot for recv buffers
  * - put booty into the alignment buffer
  **********************************************************************/
-void usrp_e100_impl::io_impl::recv_pirate_loop(usrp_e100_clock_ctrl::sptr clock_ctrl)
-{
+void usrp_e100_impl::io_impl::recv_pirate_loop(
+    boost::barrier &spawn_barrier, usrp_e100_clock_ctrl::sptr clock_ctrl
+){
+    spawn_barrier.wait();
     set_thread_priority_safe();
     recv_pirate_crew_raiding = true;
 
@@ -201,9 +204,12 @@ void usrp_e100_impl::io_init(void){
     _iface->poke32(UE_REG_CTRL_TX_POLICY, UE_FLAG_CTRL_TX_POLICY_NEXT_PACKET);
 
     //spawn a pirate, yarrr!
+    boost::barrier spawn_barrier(2);
     _io_impl->recv_pirate_crew.create_thread(boost::bind(
-        &usrp_e100_impl::io_impl::recv_pirate_loop, _io_impl.get(), _clock_ctrl
+        &usrp_e100_impl::io_impl::recv_pirate_loop, _io_impl.get(),
+        boost::ref(spawn_barrier), _clock_ctrl
     ));
+    spawn_barrier.wait();
 }
 
 void usrp_e100_impl::issue_stream_cmd(const stream_cmd_t &stream_cmd){
diff --git a/host/lib/usrp/usrp_e100/mboard_impl.cpp b/host/lib/usrp/usrp_e100/mboard_impl.cpp
index cec4fd0ad..29e3c5da2 100644
--- a/host/lib/usrp/usrp_e100/mboard_impl.cpp
+++ b/host/lib/usrp/usrp_e100/mboard_impl.cpp
@@ -36,11 +36,6 @@ void usrp_e100_impl::mboard_init(void){
         boost::bind(&usrp_e100_impl::mboard_set, this, _1, _2)
     );
 
-    //set the ticks per seconds into the vita time control
-    _iface->poke32(UE_REG_TIME64_TPS,
-        boost::uint32_t(_clock_ctrl->get_fpga_clock_rate())
-    );
-
     //init the clock config
     _clock_config = clock_config_t::internal();
     update_clock_config();
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_iface.cpp b/host/lib/usrp/usrp_e100/usrp_e100_iface.cpp
index ec0baf490..55446da63 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_iface.cpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_iface.cpp
@@ -22,7 +22,7 @@
 #include <fcntl.h> //open, close
 #include <linux/usrp_e.h> //ioctl structures and constants
 #include <boost/format.hpp>
-#include <boost/thread.hpp> //mutex
+#include <boost/thread/mutex.hpp>
 #include <linux/i2c-dev.h>
 #include <linux/i2c.h>
 #include <stdexcept>
@@ -109,6 +109,15 @@ public:
             throw uhd::io_error("Failed to open " + node);
         }
 
+        //check the module compatibility number
+        int module_compat_num = ::ioctl(_node_fd, USRP_E_GET_COMPAT_NUMBER, NULL);
+        if (module_compat_num != USRP_E_COMPAT_NUMBER){
+        throw uhd::runtime_error(str(boost::format(
+            "Expected module compatibility number 0x%x, but got 0x%x:\n"
+            "The module build is not compatible with the host code build."
+        ) % USRP_E_COMPAT_NUMBER % module_compat_num));
+    }
+
         mb_eeprom = mboard_eeprom_t(get_i2c_dev_iface(), mboard_eeprom_t::MAP_E100);
     }
 
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_iface.hpp b/host/lib/usrp/usrp_e100/usrp_e100_iface.hpp
index cb0ca2dd4..d9fe96db7 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_iface.hpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_iface.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright 2010 Ettus Research LLC
+// Copyright 2010-2011 Ettus Research LLC
 //
 // This program is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published by
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp b/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
index 1385688e0..a8fbe5d69 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
@@ -53,7 +53,7 @@ static device_addrs_t usrp_e100_find(const device_addr_t &hint){
     if (fs::exists(hint["node"])){
         device_addr_t new_addr;
         new_addr["type"] = "usrp-e";
-        new_addr["node"] = fs::system_complete(fs::path(hint["node"])).file_string();
+        new_addr["node"] = fs::system_complete(fs::path(hint["node"])).string();
         try{
             usrp_e100_iface::sptr iface = usrp_e100_iface::make(new_addr["node"]);
             new_addr["name"] = iface->mb_eeprom["name"];
@@ -120,10 +120,10 @@ static device::sptr usrp_e100_make(const device_addr_t &device_addr){
     try{std::ifstream(hash_file_path) >> loaded_hash;}catch(...){}
 
     //if not loaded: load the fpga image and write the hash-file
-    if (fpga_compat_num != USRP_E_COMPAT_NUM or loaded_hash != fpga_hash){
+    if (fpga_compat_num != USRP_E_FPGA_COMPAT_NUM or loaded_hash != fpga_hash){
         iface.reset();
         usrp_e100_load_fpga(usrp_e100_fpga_image);
-	sleep(1); ///\todo do this better one day.
+        sleep(1); ///\todo do this better one day.
         std::cout << boost::format("re-Opening USRP-E on %s") % node << std::endl;
         iface = usrp_e100_iface::make(node);
         try{std::ofstream(hash_file_path) << fpga_hash;}catch(...){}
@@ -131,11 +131,11 @@ static device::sptr usrp_e100_make(const device_addr_t &device_addr){
 
     //check that the compatibility is correct
     fpga_compat_num = iface->peek16(UE_REG_MISC_COMPAT);
-    if (fpga_compat_num != USRP_E_COMPAT_NUM){
+    if (fpga_compat_num != USRP_E_FPGA_COMPAT_NUM){
         throw uhd::runtime_error(str(boost::format(
             "Expected fpga compatibility number 0x%x, but got 0x%x:\n"
             "The fpga build is not compatible with the host code build."
-        ) % USRP_E_COMPAT_NUM % fpga_compat_num));
+        ) % USRP_E_FPGA_COMPAT_NUM % fpga_compat_num));
     }
 
     return device::sptr(new usrp_e100_impl(iface));
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp b/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp
index 897616320..98117cf26 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp
@@ -30,7 +30,7 @@
 #ifndef INCLUDED_USRP_E100_IMPL_HPP
 #define INCLUDED_USRP_E100_IMPL_HPP
 
-static const boost::uint16_t USRP_E_COMPAT_NUM = 0x03;
+static const boost::uint16_t USRP_E_FPGA_COMPAT_NUM = 0x03;
 
 //! load an fpga image from a bin file into the usrp-e fpga
 extern void usrp_e100_load_fpga(const std::string &bin_file);