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authorJosh Blum <josh@joshknows.com>2011-03-03 16:28:26 -0800
committerJosh Blum <josh@joshknows.com>2011-03-03 16:28:26 -0800
commit98028b366f840efc3b289cc7051bed73aad0963c (patch)
tree5d26773de13c4f78326896c6eb0ff78213d0912f /host/lib/usrp/usrp_e100/clock_ctrl.cpp
parentf938ed7938021c10bb0a0ce47e6d40d10f89abc2 (diff)
parent1b63cd2560886d851f3e2ba98bfddf772c44df34 (diff)
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Merge branch 'mb_iface' into next
Conflicts: host/lib/usrp/usrp2/usrp2_iface.hpp
Diffstat (limited to 'host/lib/usrp/usrp_e100/clock_ctrl.cpp')
-rw-r--r--host/lib/usrp/usrp_e100/clock_ctrl.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/host/lib/usrp/usrp_e100/clock_ctrl.cpp b/host/lib/usrp/usrp_e100/clock_ctrl.cpp
index b4ddcd271..bb6fb7e3b 100644
--- a/host/lib/usrp/usrp_e100/clock_ctrl.cpp
+++ b/host/lib/usrp/usrp_e100/clock_ctrl.cpp
@@ -409,10 +409,10 @@ private:
void send_reg(boost::uint16_t addr){
boost::uint32_t reg = _ad9522_regs.get_write_reg(addr);
//std::cout << "clock control write reg: " << std::hex << reg << std::endl;
- _iface->transact_spi(
+ _iface->write_spi(
UE_SPI_SS_AD9522,
spi_config_t::EDGE_RISE,
- reg, 24, false /*no rb*/
+ reg, 24
);
}
@@ -427,9 +427,9 @@ private:
//wait for calibration done:
static const boost::uint8_t addr = 0x01F;
for (size_t ms10 = 0; ms10 < 100; ms10++){
- boost::uint32_t reg = _iface->transact_spi(
+ boost::uint32_t reg = _iface->read_spi(
UE_SPI_SS_AD9522, spi_config_t::EDGE_RISE,
- _ad9522_regs.get_read_reg(addr), 24, true /*rb*/
+ _ad9522_regs.get_read_reg(addr), 24
);
_ad9522_regs.set_reg(addr, reg);
if (_ad9522_regs.vco_calibration_finished) return;