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authorJosh Blum <josh@joshknows.com>2010-04-29 11:50:56 +0000
committerJosh Blum <josh@joshknows.com>2010-04-29 11:50:56 +0000
commit3a8577aeb3c76dce0d0dcf0c9c7ce8d9aaf0a1d8 (patch)
tree9f98763af385dfc572a9e65a6cd8aef3df58a6ec /host/lib/usrp/usrp_e/usrp_e_regs.hpp
parent631e8debf98c0d0e56cdd31e27908f4750e7b6e6 (diff)
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work on clock control init, added dummy spi slaves: must fix
Diffstat (limited to 'host/lib/usrp/usrp_e/usrp_e_regs.hpp')
-rw-r--r--host/lib/usrp/usrp_e/usrp_e_regs.hpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/host/lib/usrp/usrp_e/usrp_e_regs.hpp b/host/lib/usrp/usrp_e/usrp_e_regs.hpp
index e7f89db7b..46df8d089 100644
--- a/host/lib/usrp/usrp_e/usrp_e_regs.hpp
+++ b/host/lib/usrp/usrp_e/usrp_e_regs.hpp
@@ -50,6 +50,15 @@
#define UE_REG_SPI_BASE UE_REG_SLAVE(2)
+//spi slave constants (copied from usrp2, TODO FIXME)
+#define UE_SPI_SS_AD9522 1
+#define UE_SPI_SS_AD9777 2
+#define UE_SPI_SS_RX_DAC 4
+#define UE_SPI_SS_RX_ADC 8
+#define UE_SPI_SS_RX_DB 16
+#define UE_SPI_SS_TX_DAC 32
+#define UE_SPI_SS_TX_ADC 64
+#define UE_SPI_SS_TX_DB 128
////////////////////////////////////////////////
// Slave 3 -- I2C Core