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author | Jason Abele <jason@ettus.com> | 2010-07-26 15:35:35 -0700 |
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committer | Jason Abele <jason@ettus.com> | 2010-08-04 18:50:37 -0700 |
commit | ce5940f86e896b639e8fe60e2901a9d59f739785 (patch) | |
tree | ae257105ff8c7bd3e6542f3322b1ddfe6c540f4c /host/lib/usrp/usrp2 | |
parent | 3852ee1650701fb3a3fcab984a186055262011b7 (diff) | |
download | uhd-ce5940f86e896b639e8fe60e2901a9d59f739785.tar.gz uhd-ce5940f86e896b639e8fe60e2901a9d59f739785.tar.bz2 uhd-ce5940f86e896b639e8fe60e2901a9d59f739785.zip |
DBSRX support in UHD
Diffstat (limited to 'host/lib/usrp/usrp2')
-rw-r--r-- | host/lib/usrp/usrp2/clock_ctrl.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/host/lib/usrp/usrp2/clock_ctrl.cpp b/host/lib/usrp/usrp2/clock_ctrl.cpp index b9be037c0..02227afad 100644 --- a/host/lib/usrp/usrp2/clock_ctrl.cpp +++ b/host/lib/usrp/usrp2/clock_ctrl.cpp @@ -86,7 +86,7 @@ public: void set_rate_rx_dboard_clock(double rate){ assert_has(get_rates_rx_dboard_clock(), rate, "rx dboard clock rate"); - size_t divider = size_t(rate/get_master_clock_rate()); + size_t divider = size_t(get_master_clock_rate()/rate); //bypass when the divider ratio is one _ad9510_regs.bypass_divider_out7 = (divider == 1)? 1 : 0; //calculate the low and high dividers @@ -118,7 +118,7 @@ public: void set_rate_tx_dboard_clock(double rate){ assert_has(get_rates_tx_dboard_clock(), rate, "tx dboard clock rate"); - size_t divider = size_t(rate/get_master_clock_rate()); + size_t divider = size_t(get_master_clock_rate()/rate); //bypass when the divider ratio is one _ad9510_regs.bypass_divider_out6 = (divider == 1)? 1 : 0; //calculate the low and high dividers |