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author | Josh Blum <josh@joshknows.com> | 2010-10-11 16:31:51 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2010-10-11 16:31:51 -0700 |
commit | 453b450aa2f40f1ab3689855654fd2167f554ccc (patch) | |
tree | 7a5fd3d4b46734cd708e7881fd375f77528b6806 /host/lib/usrp/usrp2/fw_common.h | |
parent | 37f1f1451f65aace9ca978ac3edcaa31d16e8c0d (diff) | |
download | uhd-453b450aa2f40f1ab3689855654fd2167f554ccc.tar.gz uhd-453b450aa2f40f1ab3689855654fd2167f554ccc.tar.bz2 uhd-453b450aa2f40f1ab3689855654fd2167f554ccc.zip |
usrp2: implemented flow control monitor
set registers in mboard impl to enable asyn fc packets
modified microblaze code to handle dummy data packet offset
Diffstat (limited to 'host/lib/usrp/usrp2/fw_common.h')
-rw-r--r-- | host/lib/usrp/usrp2/fw_common.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h index e812e1221..783e5c772 100644 --- a/host/lib/usrp/usrp2/fw_common.h +++ b/host/lib/usrp/usrp2/fw_common.h @@ -34,7 +34,7 @@ extern "C" { //fpga and firmware compatibility numbers #define USRP2_FPGA_COMPAT_NUM 2 -#define USRP2_FW_COMPAT_NUM 6 +#define USRP2_FW_COMPAT_NUM 7 //used to differentiate control packets over data port #define USRP2_INVALID_VRT_HEADER 0 |