Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdpriv into flow_ctrl

Conflicts:
	host/lib/transport/udp_simple.cpp
	host/lib/usrp/usrp2/mboard_impl.cpp
	host/lib/usrp/usrp2/usrp2_iface.cpp
	host/lib/usrp/usrp2/usrp2_regs.hpp

1 files changed, 80 insertions, 2 deletions

diff --git a/host/lib/usrp/usrp2/codec_ctrl.cpp b/host/lib/usrp/usrp2/codec_ctrl.cpp
index 32cc13ded..ad1ae1acb 100644
--- a/host/lib/usrp/usrp2/codec_ctrl.cpp
+++ b/host/lib/usrp/usrp2/codec_ctrl.cpp
@@ -17,10 +17,12 @@
 
 #include "codec_ctrl.hpp"
 #include "ad9777_regs.hpp"
+#include "ads62p44_regs.hpp"
 #include "usrp2_regs.hpp"
 #include <boost/cstdint.hpp>
 #include <boost/foreach.hpp>
 #include <iostream>
+#include <uhd/utils/exception.hpp>
 
 static const bool codec_ctrl_debug = false;
 
@@ -57,7 +59,24 @@ public:
         }
 
         //power-up adc
-        _iface->poke32(U2_REG_MISC_CTRL_ADC, U2_FLAG_MISC_CTRL_ADC_ON);
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP2_REV3:
+        case usrp2_iface::USRP2_REV4:
+            _iface->poke32(_iface->regs.misc_ctrl_adc, U2_FLAG_MISC_CTRL_ADC_ON);
+            break;
+
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            _ads62p44_regs.reset = 1;
+            this->send_ads62p44_reg(0x00); //issue a reset to the ADC
+            //everything else should be pretty much default, i think
+            //_ads62p44_regs.decimation = DECIMATION_DECIMATE_1;
+            _ads62p44_regs.power_down = ads62p44_regs_t::POWER_DOWN_NORMAL;
+            this->send_ads62p44_reg(0x14);
+            break;
+
+        case usrp2_iface::USRP_NXXX: break;
+        }
     }
 
     ~usrp2_codec_ctrl_impl(void){
@@ -66,11 +85,62 @@ public:
         this->send_ad9777_reg(0);
 
         //power-down adc
-        _iface->poke32(U2_REG_MISC_CTRL_ADC, U2_FLAG_MISC_CTRL_ADC_OFF);
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP2_REV3:
+        case usrp2_iface::USRP2_REV4:
+            _iface->poke32(_iface->regs.misc_ctrl_adc, U2_FLAG_MISC_CTRL_ADC_OFF);
+            break;
+
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            //send a global power-down to the ADC here... it will get lifted on reset
+            _ads62p44_regs.power_down = ads62p44_regs_t::POWER_DOWN_GLOBAL_PD;
+            this->send_ads62p44_reg(0x14);
+            break;
+
+        case usrp2_iface::USRP_NXXX: break;
+        }
+    }
+
+    void set_rx_digital_gain(float gain) {  //fine digital gain
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            _ads62p44_regs.fine_gain = int(gain/0.5);
+            this->send_ads62p44_reg(0x17);
+            break;
+
+        default: UHD_THROW_INVALID_CODE_PATH();
+        }
+    }
+
+    void set_rx_digital_fine_gain(float gain) { //gain correction      
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            _ads62p44_regs.gain_correction = int(gain / 0.05);
+            this->send_ads62p44_reg(0x1A);
+            break;
+
+        default: UHD_THROW_INVALID_CODE_PATH();
+        }
+    }
+
+    void set_rx_analog_gain(bool gain) { //turns on/off analog 3.5dB preamp
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            _ads62p44_regs.coarse_gain = gain ? ads62p44_regs_t::COARSE_GAIN_3_5DB : ads62p44_regs_t::COARSE_GAIN_0DB;
+            this->send_ads62p44_reg(0x14);
+            break;
+
+        default: UHD_THROW_INVALID_CODE_PATH();
+        }
     }
 
 private:
     ad9777_regs_t _ad9777_regs;
+    ads62p44_regs_t _ads62p44_regs;
     usrp2_iface::sptr _iface;
 
     void send_ad9777_reg(boost::uint8_t addr){
@@ -81,6 +151,14 @@ private:
             reg, 16, false /*no rb*/
         );
     }
+
+    void send_ads62p44_reg(boost::uint8_t addr) {
+        boost::uint16_t reg = _ads62p44_regs.get_write_reg(addr);
+        _iface->transact_spi(
+            SPI_SS_ADS62P44, spi_config_t::EDGE_FALL,
+            reg, 16, false /*no rb*/
+        );
+    }
 };
 
 /***********************************************************************