Merge branch 'maint34' into maint

Conflicts:
	host/lib/usrp/b100/b100_impl.cpp
	host/lib/usrp/usrp1/usrp1_impl.hpp

6 files changed, 91 insertions, 14 deletions

diff --git a/host/lib/usrp/usrp1/dboard_iface.cpp b/host/lib/usrp/usrp1/dboard_iface.cpp
index 34bbe1893..39850d5d1 100644
--- a/host/lib/usrp/usrp1/dboard_iface.cpp
+++ b/host/lib/usrp/usrp1/dboard_iface.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright 2010-2011 Ettus Research LLC
+// Copyright 2010-2012 Ettus Research LLC
 //
 // This program is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published by
@@ -17,9 +17,6 @@
 
 #include "usrp1_iface.hpp"
 #include "usrp1_impl.hpp"
-#include "fpga_regs_common.h"
-#include "usrp_spi_defs.h"
-#include "fpga_regs_standard.h"
 #include "codec_ctrl.hpp"
 #include <uhd/usrp/dboard_iface.hpp>
 #include <uhd/types/dict.hpp>
@@ -27,6 +24,43 @@
 #include <boost/assign/list_of.hpp>
 #include <iostream>
 
+#define FR_OE_0        5
+#define FR_OE_1        6
+#define FR_OE_2        7
+#define FR_OE_3        8
+
+#define FR_ATR_MASK_0  20
+#define FR_ATR_TXVAL_0 21
+#define FR_ATR_RXVAL_0 22
+
+#define FR_ATR_MASK_1  23
+#define FR_ATR_TXVAL_1 24
+#define FR_ATR_RXVAL_1 25
+
+#define FR_ATR_MASK_2  26
+#define FR_ATR_TXVAL_2 27
+#define FR_ATR_RXVAL_2 28
+
+#define FR_ATR_MASK_3  29
+#define FR_ATR_TXVAL_3 30
+#define FR_ATR_RXVAL_3 31
+
+#define FR_RX_A_REFCLK 41
+#define FR_RX_B_REFCLK 43
+
+// i/o registers for pins that go to daughterboards.
+// top 16 is a mask, low 16 is value
+
+#define FR_IO_0          9  // slot 0
+#define FR_IO_1         10
+#define FR_IO_2         11
+#define FR_IO_3         12
+#define SPI_ENABLE_TX_A     0x10    // select d'board TX A
+#define SPI_ENABLE_RX_A     0x20    // select d'board RX A
+#define SPI_ENABLE_TX_B     0x40    // select d'board TX B
+#define SPI_ENABLE_RX_B     0x80    // select d'board RX B
+
+
 using namespace uhd;
 using namespace uhd::usrp;
 using namespace boost::assign;
diff --git a/host/lib/usrp/usrp1/io_impl.cpp b/host/lib/usrp/usrp1/io_impl.cpp
index 1d8b9bd76..8940a92bb 100644
--- a/host/lib/usrp/usrp1/io_impl.cpp
+++ b/host/lib/usrp/usrp1/io_impl.cpp
@@ -21,9 +21,6 @@
 #define SSPH_DONT_PAD_TO_ONE
 #include "../../transport/super_send_packet_handler.hpp"
 #include "usrp1_calc_mux.hpp"
-#include "fpga_regs_standard.h"
-#include "fpga_regs_common.h"
-#include "usrp_commands.h"
 #include "usrp1_impl.hpp"
 #include <uhd/utils/msg.hpp>
 #include <uhd/utils/tasks.hpp>
@@ -36,6 +33,26 @@
 #include <boost/format.hpp>
 #include <boost/make_shared.hpp>
 
+#define bmFR_RX_FORMAT_SHIFT_SHIFT 0
+#define bmFR_RX_FORMAT_WIDTH_SHIFT 4
+#define bmFR_TX_FORMAT_16_IQ       0
+#define bmFR_RX_FORMAT_WANT_Q      (0x1  <<  9)
+#define FR_RX_FREQ_0               34
+#define FR_RX_FREQ_1               35
+#define FR_RX_FREQ_2               36
+#define FR_RX_FREQ_3               37
+#define FR_INTERP_RATE             32
+#define FR_DECIM_RATE              33
+#define FR_RX_MUX                  38
+#define FR_TX_MUX                  39
+#define FR_TX_FORMAT               48
+#define FR_RX_FORMAT               49
+#define FR_TX_SAMPLE_RATE_DIV      0
+#define FR_RX_SAMPLE_RATE_DIV      1
+#define GS_TX_UNDERRUN             0
+#define GS_RX_OVERRUN              1
+#define VRQ_GET_STATUS             0x80
+
 using namespace uhd;
 using namespace uhd::usrp;
 using namespace uhd::transport;
diff --git a/host/lib/usrp/usrp1/usrp1_iface.cpp b/host/lib/usrp/usrp1/usrp1_iface.cpp
index c790aecb4..16b747e45 100644
--- a/host/lib/usrp/usrp1/usrp1_iface.cpp
+++ b/host/lib/usrp/usrp1/usrp1_iface.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright 2010-2011 Ettus Research LLC
+// Copyright 2010-2012 Ettus Research LLC
 //
 // This program is free software: you can redistribute it and/or modify
 // it under the terms of the GNU General Public License as published by
@@ -16,7 +16,6 @@
 //
 
 #include "usrp1_iface.hpp"
-#include "usrp_commands.h"
 #include <uhd/utils/log.hpp>
 #include <uhd/exception.hpp>
 #include <uhd/utils/byteswap.hpp>
diff --git a/host/lib/usrp/usrp1/usrp1_iface.hpp b/host/lib/usrp/usrp1/usrp1_iface.hpp
index c1ac34f25..4612d7912 100644
--- a/host/lib/usrp/usrp1/usrp1_iface.hpp
+++ b/host/lib/usrp/usrp1/usrp1_iface.hpp
@@ -24,6 +24,19 @@
 #include <boost/shared_ptr.hpp>
 #include <boost/utility.hpp>
 
+#define SPI_ENABLE_FPGA  0x01
+#define SPI_FMT_HDR_MASK (3 << 5)
+#define SPI_FMT_HDR_0    (0 << 5)
+#define SPI_FMT_HDR_1    (1 << 5)
+#define SPI_FMT_HDR_2    (2 << 5)
+#define SPI_FMT_LSB      (1 << 7)
+#define SPI_FMT_MSB      (0 << 7)
+#define SPI_FMT_xSB_MASK (1 << 7)
+#define VRQ_SPI_READ     0x82
+#define VRQ_SPI_WRITE    0x09
+#define VRQ_FW_COMPAT    0x83
+
+
 /*!
  * The usrp1 interface class:
  * Provides a set of functions to implementation layer.
diff --git a/host/lib/usrp/usrp1/usrp1_impl.cpp b/host/lib/usrp/usrp1/usrp1_impl.cpp
index a5e51b7d2..253ac1d6f 100644
--- a/host/lib/usrp/usrp1/usrp1_impl.cpp
+++ b/host/lib/usrp/usrp1/usrp1_impl.cpp
@@ -16,11 +16,6 @@
 //
 
 #include "usrp1_impl.hpp"
-#include "usrp_spi_defs.h"
-#include "usrp_commands.h"
-#include "fpga_regs_standard.h"
-#include "fpga_regs_common.h"
-#include "usrp_i2c_addr.h"
 #include <uhd/utils/log.hpp>
 #include <uhd/utils/safe_call.hpp>
 #include <uhd/transport/usb_control.hpp>
diff --git a/host/lib/usrp/usrp1/usrp1_impl.hpp b/host/lib/usrp/usrp1/usrp1_impl.hpp
index 9461f0081..0be8ebca9 100644
--- a/host/lib/usrp/usrp1/usrp1_impl.hpp
+++ b/host/lib/usrp/usrp1/usrp1_impl.hpp
@@ -40,6 +40,25 @@
 
 static const std::string USRP1_EEPROM_MAP_KEY = "B000";
 
+#define FR_RB_CAPS          3
+#define FR_MODE             13
+#define FR_DEBUG_EN         14
+#define FR_DC_OFFSET_CL_EN  15
+#define FR_ADC_OFFSET_0     16
+#define FR_ADC_OFFSET_1     17
+#define FR_ADC_OFFSET_2     18
+#define FR_ADC_OFFSET_3     19
+
+#define I2C_DEV_EEPROM      0x50
+#define I2C_ADDR_BOOT       (I2C_DEV_EEPROM | 0x0)
+#define I2C_ADDR_TX_A       (I2C_DEV_EEPROM | 0x4)
+#define I2C_ADDR_RX_A       (I2C_DEV_EEPROM | 0x5)
+#define I2C_ADDR_TX_B       (I2C_DEV_EEPROM | 0x6)
+#define I2C_ADDR_RX_B       (I2C_DEV_EEPROM | 0x7)
+
+#define SPI_ENABLE_CODEC_A  0x02
+#define SPI_ENABLE_CODEC_B  0x04
+
 /*!
  * USRP1 implementation guts:
  * The implementation details are encapsulated here.