diff options
author | Josh Blum <josh@joshknows.com> | 2011-05-04 19:53:01 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-05-04 19:53:01 -0700 |
commit | 09be0518cee887878f3b070adea25eccc4c06e60 (patch) | |
tree | d25df33a4860116d51fd5ac49753739397948353 /host/lib/usrp/usrp1 | |
parent | 805da3ef3d5b04dfa39587c531a3415b09d2ea5b (diff) | |
download | uhd-09be0518cee887878f3b070adea25eccc4c06e60.tar.gz uhd-09be0518cee887878f3b070adea25eccc4c06e60.tar.bz2 uhd-09be0518cee887878f3b070adea25eccc4c06e60.zip |
uhd: removed more iostream stuff from usrp* implementations
Diffstat (limited to 'host/lib/usrp/usrp1')
-rw-r--r-- | host/lib/usrp/usrp1/clock_ctrl.cpp | 8 | ||||
-rw-r--r-- | host/lib/usrp/usrp1/codec_ctrl.cpp | 47 | ||||
-rw-r--r-- | host/lib/usrp/usrp1/dsp_impl.cpp | 6 | ||||
-rw-r--r-- | host/lib/usrp/usrp1/io_impl.cpp | 10 | ||||
-rw-r--r-- | host/lib/usrp/usrp1/mboard_impl.cpp | 30 | ||||
-rw-r--r-- | host/lib/usrp/usrp1/usrp1_ctrl.cpp | 10 | ||||
-rw-r--r-- | host/lib/usrp/usrp1/usrp1_iface.cpp | 23 | ||||
-rw-r--r-- | host/lib/usrp/usrp1/usrp1_impl.cpp | 6 |
8 files changed, 66 insertions, 74 deletions
diff --git a/host/lib/usrp/usrp1/clock_ctrl.cpp b/host/lib/usrp/usrp1/clock_ctrl.cpp index 154e6a316..9edc010dd 100644 --- a/host/lib/usrp/usrp1/clock_ctrl.cpp +++ b/host/lib/usrp/usrp1/clock_ctrl.cpp @@ -16,9 +16,9 @@ // #include "clock_ctrl.hpp" +#include <uhd/utils/msg.hpp> #include <boost/lexical_cast.hpp> #include <boost/format.hpp> -#include <iostream> using namespace uhd; @@ -36,14 +36,14 @@ public: this->set_master_clock_freq(default_master_clock_rate); try{ if (not _iface->mb_eeprom["mcr"].empty()){ - std::cout << "Read FPGA clock rate from EEPROM setting." << std::endl; + UHD_MSG(status) << "Read FPGA clock rate from EEPROM setting." << std::endl; const double master_clock_rate = boost::lexical_cast<double>(_iface->mb_eeprom["mcr"]); - std::cout << boost::format("Initializing FPGA clock to %fMHz...") % (master_clock_rate/1e6) << std::endl; + UHD_MSG(status) << boost::format("Initializing FPGA clock to %fMHz...") % (master_clock_rate/1e6) << std::endl; this->set_master_clock_freq(master_clock_rate); } } catch(const std::exception &e){ - std::cerr << "Error setting FPGA clock rate from EEPROM: " << e.what() << std::endl; + UHD_MSG(error) << "Error setting FPGA clock rate from EEPROM: " << e.what() << std::endl; } } diff --git a/host/lib/usrp/usrp1/codec_ctrl.cpp b/host/lib/usrp/usrp1/codec_ctrl.cpp index 9df29da0e..64a93ede5 100644 --- a/host/lib/usrp/usrp1/codec_ctrl.cpp +++ b/host/lib/usrp/usrp1/codec_ctrl.cpp @@ -19,6 +19,7 @@ #include "usrp_commands.h" #include "clock_ctrl.hpp" #include "ad9862_regs.hpp" +#include <uhd/utils/log.hpp> #include <uhd/types/dict.hpp> #include <uhd/exception.hpp> #include <uhd/utils/algorithm.hpp> @@ -28,13 +29,10 @@ #include <boost/tuple/tuple.hpp> #include <boost/math/special_functions/round.hpp> #include <boost/assign/list_of.hpp> -#include <iostream> #include <iomanip> using namespace uhd; -static const bool codec_debug = false; - const gain_range_t usrp1_codec_ctrl::tx_pga_gain_range(-20, 0, double(0.1)); const gain_range_t usrp1_codec_ctrl::rx_pga_gain_range(0, 20, 1); @@ -283,11 +281,10 @@ void usrp1_codec_ctrl_impl::send_reg(boost::uint8_t addr) { boost::uint32_t reg = _ad9862_regs.get_write_reg(addr); - if (codec_debug) { - std::cout.fill('0'); - std::cout << "codec control write reg: 0x"; - std::cout << std::setw(8) << std::hex << reg << std::endl; - } + UHD_LOGV(often) + << "codec control write reg: 0x" + << std::setw(8) << std::hex << reg << std::endl + ; _iface->write_spi(_spi_slave, spi_config_t::EDGE_RISE, reg, 16); } @@ -296,20 +293,18 @@ void usrp1_codec_ctrl_impl::recv_reg(boost::uint8_t addr) { boost::uint32_t reg = _ad9862_regs.get_read_reg(addr); - if (codec_debug) { - std::cout.fill('0'); - std::cout << "codec control read reg: 0x"; - std::cout << std::setw(8) << std::hex << reg << std::endl; - } + UHD_LOGV(often) + << "codec control read reg: 0x" + << std::setw(8) << std::hex << reg << std::endl + ; boost::uint32_t ret = _iface->read_spi(_spi_slave, spi_config_t::EDGE_RISE, reg, 16); - if (codec_debug) { - std::cout.fill('0'); - std::cout << "codec control read ret: 0x"; - std::cout << std::setw(8) << std::hex << ret << std::endl; - } + UHD_LOGV(often) + << "codec control read ret: 0x" + << std::setw(8) << std::hex << ret << std::endl + ; _ad9862_regs.set_reg(addr, boost::uint16_t(ret)); } @@ -392,14 +387,14 @@ void usrp1_codec_ctrl_impl::set_duc_freq(double freq) double coarse_freq = coarse_tune(codec_rate, freq); double fine_freq = fine_tune(codec_rate / 4, freq - coarse_freq); - if (codec_debug) { - std::cout << "ad9862 tuning result:" << std::endl; - std::cout << " requested: " << freq << std::endl; - std::cout << " actual: " << coarse_freq + fine_freq << std::endl; - std::cout << " coarse freq: " << coarse_freq << std::endl; - std::cout << " fine freq: " << fine_freq << std::endl; - std::cout << " codec rate: " << codec_rate << std::endl; - } + UHD_LOG + << "ad9862 tuning result:" << std::endl + << " requested: " << freq << std::endl + << " actual: " << coarse_freq + fine_freq << std::endl + << " coarse freq: " << coarse_freq << std::endl + << " fine freq: " << fine_freq << std::endl + << " codec rate: " << codec_rate << std::endl + ; this->send_reg(20); this->send_reg(21); diff --git a/host/lib/usrp/usrp1/dsp_impl.cpp b/host/lib/usrp/usrp1/dsp_impl.cpp index 8152c4e34..9f1e4975a 100644 --- a/host/lib/usrp/usrp1/dsp_impl.cpp +++ b/host/lib/usrp/usrp1/dsp_impl.cpp @@ -17,13 +17,13 @@ #include "usrp1_impl.hpp" #include "fpga_regs_standard.h" +#include <uhd/utils/msg.hpp> #include <uhd/usrp/dsp_utils.hpp> #include <uhd/usrp/dsp_props.hpp> #include <boost/bind.hpp> #include <boost/format.hpp> #include <boost/lexical_cast.hpp> #include <boost/assign/list_of.hpp> -#include <iostream> #include <cmath> using namespace uhd; @@ -104,7 +104,7 @@ void usrp1_impl::rx_dsp_set(const wax::obj &key_, const wax::obj &val, size_t wh size_t rate = size_t(_clock_ctrl->get_master_clock_freq() / val.as<double>()); if ((rate & 0x01) || (rate < 4) || (rate > 256)) { - std::cerr << "Decimation must be even and between 4 and 256" + UHD_MSG(error) << "Decimation must be even and between 4 and 256" << std::endl; return; } @@ -202,7 +202,7 @@ void usrp1_impl::tx_dsp_set(const wax::obj &key_, const wax::obj &val, size_t wh size_t rate = size_t(_clock_ctrl->get_master_clock_freq() * 2 / val.as<double>()); if ((rate & 0x01) || (rate < 8) || (rate > 512)) { - std::cerr << "Interpolation rate must be even and between 8 and 512" + UHD_MSG(error) << "Interpolation rate must be even and between 8 and 512" << std::endl; return; } diff --git a/host/lib/usrp/usrp1/io_impl.cpp b/host/lib/usrp/usrp1/io_impl.cpp index 8fb639c4a..22d078e70 100644 --- a/host/lib/usrp/usrp1/io_impl.cpp +++ b/host/lib/usrp/usrp1/io_impl.cpp @@ -18,6 +18,7 @@ #include "../../transport/vrt_packet_handler.hpp" #include "usrp_commands.h" #include "usrp1_impl.hpp" +#include <uhd/utils/msg.hpp> #include <uhd/utils/safe_call.hpp> #include <uhd/utils/thread_priority.hpp> #include <uhd/transport/bounded_buffer.hpp> @@ -26,7 +27,6 @@ #include <boost/asio.hpp> #include <boost/bind.hpp> #include <boost/thread.hpp> -#include <iostream> using namespace uhd; using namespace uhd::usrp; @@ -306,8 +306,8 @@ size_t usrp1_impl::send( VRQ_GET_STATUS, 0, GS_TX_UNDERRUN, &underflow, sizeof(underflow) ); - if (ret < 0) std::cerr << "USRP: underflow check failed" << std::endl; - else if (underflow) std::cerr << "U" << std::flush; + if (ret < 0) UHD_MSG(error) << "USRP: underflow check failed" << std::endl; + else if (underflow) UHD_MSG(fastpath) << "U"; } return num_samps_sent; @@ -370,8 +370,8 @@ size_t usrp1_impl::recv( VRQ_GET_STATUS, 0, GS_RX_OVERRUN, &overflow, sizeof(overflow) ); - if (ret < 0) std::cerr << "USRP: overflow check failed" << std::endl; - else if (overflow) std::cerr << "O" << std::flush; + if (ret < 0) UHD_MSG(error) << "USRP: overflow check failed" << std::endl; + else if (overflow) UHD_MSG(fastpath) << "O"; } return num_samps_recvd; diff --git a/host/lib/usrp/usrp1/mboard_impl.cpp b/host/lib/usrp/usrp1/mboard_impl.cpp index aa9ce244b..cd04e7351 100644 --- a/host/lib/usrp/usrp1/mboard_impl.cpp +++ b/host/lib/usrp/usrp1/mboard_impl.cpp @@ -20,6 +20,8 @@ #include "fpga_regs_standard.h" #include "fpga_regs_common.h" #include "usrp_i2c_addr.h" +#include <uhd/utils/msg.hpp> +#include <uhd/utils/log.hpp> #include <uhd/usrp/misc_utils.hpp> #include <uhd/usrp/mboard_props.hpp> #include <uhd/usrp/dboard_props.hpp> @@ -31,13 +33,10 @@ #include <boost/foreach.hpp> #include <boost/bind.hpp> #include <boost/thread/thread.hpp> -#include <iostream> using namespace uhd; using namespace uhd::usrp; -static const bool usrp1_mboard_verbose = false; - /*********************************************************************** * Calculate the RX mux value: * The I and Q mux values are intentionally reversed to flip I and Q @@ -231,13 +230,13 @@ void usrp1_impl::mboard_init(void) // Set default for TX format to 16-bit I&Q _iface->poke32(FR_TX_FORMAT, 0x00000000); - if (usrp1_mboard_verbose){ - std::cout << "USRP1 Capabilities" << std::endl; - std::cout << " number of duc's: " << get_num_ddcs() << std::endl; - std::cout << " number of ddc's: " << get_num_ducs() << std::endl; - std::cout << " rx halfband: " << has_rx_halfband() << std::endl; - std::cout << " tx halfband: " << has_tx_halfband() << std::endl; - } + UHD_LOG + << "USRP1 Capabilities" << std::endl + << " number of duc's: " << get_num_ddcs() << std::endl + << " number of ddc's: " << get_num_ducs() << std::endl + << " rx halfband: " << has_rx_halfband() << std::endl + << " tx halfband: " << has_tx_halfband() << std::endl + ; } /*********************************************************************** @@ -331,7 +330,7 @@ void usrp1_impl::mboard_set(const wax::obj &key, const wax::obj &val) if(key.type() == typeid(std::string)) { if(key.as<std::string>() == "load_eeprom") { std::string usrp1_eeprom_image = val.as<std::string>(); - std::cout << "USRP1 EEPROM image: " << usrp1_eeprom_image << std::endl; + UHD_MSG(status) << "USRP1 EEPROM image: " << usrp1_eeprom_image << std::endl; _ctrl_transport->usrp_load_eeprom(val.as<std::string>()); } return; @@ -378,10 +377,11 @@ void usrp1_impl::mboard_set(const wax::obj &key, const wax::obj &val) return; case MBOARD_PROP_CLOCK_RATE: - std::cerr << "Helpful message:" << std::endl; - std::cerr << " I see that you are setting the master clock rate from the API." << std::endl; - std::cerr << " You may find it more convenient to burn this setting into the EEPROM." << std::endl; - std::cerr << " See the application notes for USRP1 for further instructions." << std::endl; + UHD_MSG(warning) + << "I see that you are setting the master clock rate from the API.\n" + << "You may find it more convenient to burn this setting into the EEPROM.\n" + << "See the application notes for USRP1 for further instructions.\n" + ; _clock_ctrl->set_master_clock_freq(val.as<double>()); return; diff --git a/host/lib/usrp/usrp1/usrp1_ctrl.cpp b/host/lib/usrp/usrp1/usrp1_ctrl.cpp index c6be28f5f..96dc5d80c 100644 --- a/host/lib/usrp/usrp1/usrp1_ctrl.cpp +++ b/host/lib/usrp/usrp1/usrp1_ctrl.cpp @@ -17,11 +17,11 @@ #include "usrp1_ctrl.hpp" #include "usrp_commands.h" +#include <uhd/utils/msg.hpp> #include <uhd/exception.hpp> #include <uhd/transport/usb_control.hpp> #include <boost/functional/hash.hpp> #include <boost/thread/thread.hpp> -#include <iostream> #include <fstream> #include <sstream> #include <string> @@ -162,7 +162,7 @@ public: unsigned char reset_n = 0; //hit the reset line - if (load_img_msg) std::cout << "Loading firmware image: " << filestring << "..." << std::flush; + if (load_img_msg) UHD_MSG(status) << "Loading firmware image: " << filestring << "..." << std::flush; usrp_control_write(FX2_FIRMWARE_LOAD, 0xe600, 0, &reset_y, 1); while (!file.eof()) { @@ -187,7 +187,7 @@ public: //wait for things to settle boost::this_thread::sleep(boost::posix_time::milliseconds(1000)); - if (load_img_msg) std::cout << " done" << std::endl; + if (load_img_msg) UHD_MSG(status) << " done" << std::endl; return; } //type anything else is unhandled @@ -228,7 +228,7 @@ public: const int ep0_size = 64; unsigned char buf[ep0_size]; - if (load_img_msg) std::cout << "Loading FPGA image: " << filestring << "..." << std::flush; + if (load_img_msg) UHD_MSG(status) << "Loading FPGA image: " << filestring << "..." << std::flush; std::ifstream file; file.open(filename, std::ios::in | std::ios::binary); if (not file.good()) { @@ -259,7 +259,7 @@ public: usrp_fpga_reset(false); //done loading, take fpga out of reset file.close(); - if (load_img_msg) std::cout << " done" << std::endl; + if (load_img_msg) UHD_MSG(status) << " done" << std::endl; } void usrp_load_eeprom(std::string filestring) diff --git a/host/lib/usrp/usrp1/usrp1_iface.cpp b/host/lib/usrp/usrp1/usrp1_iface.cpp index 8f10df751..d7e8f601f 100644 --- a/host/lib/usrp/usrp1/usrp1_iface.cpp +++ b/host/lib/usrp/usrp1/usrp1_iface.cpp @@ -17,19 +17,17 @@ #include "usrp1_iface.hpp" #include "usrp_commands.h" +#include <uhd/utils/log.hpp> #include <uhd/exception.hpp> #include <uhd/utils/byteswap.hpp> #include <boost/format.hpp> #include <stdexcept> -#include <iostream> #include <iomanip> using namespace uhd; using namespace uhd::usrp; using namespace uhd::transport; -static const bool iface_debug = false; - class usrp1_iface_impl : public usrp1_iface{ public: /******************************************************************* @@ -53,12 +51,11 @@ public: { boost::uint32_t swapped = uhd::htonx(value); - if (iface_debug) { - std::cout.fill('0'); - std::cout << "poke32("; - std::cout << std::dec << std::setw(2) << addr << ", 0x"; - std::cout << std::hex << std::setw(8) << value << ")" << std::endl; - } + UHD_LOGV(always) + << "poke32(" + << std::dec << std::setw(2) << addr << ", 0x" + << std::hex << std::setw(8) << value << ")" << std::endl + ; boost::uint8_t w_index_h = SPI_ENABLE_FPGA & 0xff; boost::uint8_t w_index_l = (SPI_FMT_MSB | SPI_FMT_HDR_1) & 0xff; @@ -129,8 +126,8 @@ public: bytes.size()); // TODO throw and catch i2c failures during eeprom read - if (iface_debug && (ret < 0)) - std::cerr << "USRP: failed i2c write: " << ret << std::endl; + if (ret < 0) + UHD_LOGV(often) << "USRP: failed i2c write: " << ret << std::endl; } byte_vector_t read_i2c(boost::uint8_t addr, size_t num_bytes) @@ -143,8 +140,8 @@ public: num_bytes); // TODO throw and catch i2c failures during eeprom read - if (iface_debug && ((ret < 0) || (unsigned)ret < (num_bytes))) { - std::cerr << "USRP: failed i2c read: " << ret << std::endl; + if (ret < 0 or (unsigned)ret < num_bytes) { + UHD_LOGV(often) << "USRP: failed i2c read: " << ret << std::endl; return byte_vector_t(num_bytes, 0xff); } diff --git a/host/lib/usrp/usrp1/usrp1_impl.cpp b/host/lib/usrp/usrp1/usrp1_impl.cpp index b7cd95a82..182705034 100644 --- a/host/lib/usrp/usrp1/usrp1_impl.cpp +++ b/host/lib/usrp/usrp1/usrp1_impl.cpp @@ -19,6 +19,7 @@ #include "usrp1_ctrl.hpp" #include "fpga_regs_standard.h" #include "usrp_spi_defs.h" +#include <uhd/utils/log.hpp> #include <uhd/utils/safe_call.hpp> #include <uhd/transport/usb_control.hpp> #include <uhd/usrp/device_props.hpp> @@ -32,7 +33,6 @@ #include <boost/filesystem.hpp> #include <boost/thread/thread.hpp> #include <boost/lexical_cast.hpp> -#include <iostream> using namespace uhd; using namespace uhd::usrp; @@ -84,7 +84,7 @@ static device_addrs_t usrp1_find(const device_addr_t &hint) ); return usrp1_addrs; } - //std::cout << "USRP1 firmware image: " << usrp1_fw_image << std::endl; + UHD_LOG << "USRP1 firmware image: " << usrp1_fw_image << std::endl; usb_control::sptr control; try{control = usb_control::make(handle);} @@ -128,7 +128,7 @@ static device::sptr usrp1_make(const device_addr_t &device_addr){ std::string usrp1_fpga_image = find_image_path( device_addr.get("fpga", "usrp1_fpga.rbf") ); - //std::cout << "USRP1 FPGA image: " << usrp1_fpga_image << std::endl; + UHD_LOG << "USRP1 FPGA image: " << usrp1_fpga_image << std::endl; //try to match the given device address with something on the USB bus std::vector<usb_device_handle::sptr> device_list = |