aboutsummaryrefslogtreecommitdiffstats
path: root/host/lib/usrp/n230/n230_resource_manager.cpp
diff options
context:
space:
mode:
authorAshish Chaudhari <ashish@ettus.com>2016-01-05 17:08:06 -0800
committerAshish Chaudhari <ashish@ettus.com>2016-01-05 17:35:15 -0800
commit81bbb57c06feaa05406ba86abc237a2e80841226 (patch)
tree11bb0cf199ca3a99a676d620e3ffc2b679e5a394 /host/lib/usrp/n230/n230_resource_manager.cpp
parent863ca545d629e0e40a21e085572440e764de882d (diff)
downloaduhd-81bbb57c06feaa05406ba86abc237a2e80841226.tar.gz
uhd-81bbb57c06feaa05406ba86abc237a2e80841226.tar.bz2
uhd-81bbb57c06feaa05406ba86abc237a2e80841226.zip
n230: GPIO ATR cleanup and miniSAS GPIO support
- Replaced all gpio_200 cores with gpio_3000 - Added support for miniSAS GPIO through FP0 and FP1 banks
Diffstat (limited to 'host/lib/usrp/n230/n230_resource_manager.cpp')
-rw-r--r--host/lib/usrp/n230/n230_resource_manager.cpp13
1 files changed, 11 insertions, 2 deletions
diff --git a/host/lib/usrp/n230/n230_resource_manager.cpp b/host/lib/usrp/n230/n230_resource_manager.cpp
index 7f1e9a6f0..fa55d0cd8 100644
--- a/host/lib/usrp/n230/n230_resource_manager.cpp
+++ b/host/lib/usrp/n230/n230_resource_manager.cpp
@@ -163,7 +163,7 @@ n230_resource_manager::n230_resource_manager(
_reset_codec_digital_interface();
std::vector<time_core_3000::sptr> time_cores;
- std::vector<gpio_core_200_32wo::sptr> gpio_cores;
+ std::vector<gpio_atr::gpio_atr_3000::sptr> gpio_cores;
for (size_t i = 0; i < fpga::NUM_RADIOS; i++) {
_initialize_radio(i);
time_cores.push_back(_radios[i].time);
@@ -183,6 +183,14 @@ n230_resource_manager::n230_resource_manager(
throw uhd::runtime_error("N230 Initialization Error: Could not create front-end ctrl.)");
}
+ //Create miniSAS GPIO interfaces
+ _ms0_gpio = gpio_atr::gpio_atr_3000::make(
+ _core_ctrl, fpga::sr_addr(fpga::SR_CORE_MS0_GPIO), fpga::rb_addr(fpga::RB_CORE_MS0_GPIO));
+ _ms0_gpio->set_atr_mode(gpio_atr::MODE_GPIO,gpio_atr::gpio_atr_3000::MASK_SET_ALL);
+ _ms1_gpio = gpio_atr::gpio_atr_3000::make(
+ _core_ctrl, fpga::sr_addr(fpga::SR_CORE_MS1_GPIO), fpga::rb_addr(fpga::RB_CORE_MS1_GPIO));
+ _ms1_gpio->set_atr_mode(gpio_atr::MODE_GPIO,gpio_atr::gpio_atr_3000::MASK_SET_ALL);
+
//Create GPSDO interface
const sid_t gps_uart_sid = _generate_sid(GPS_UART, _get_conn(PRI_ETH).type);
transport::zero_copy_if::sptr gps_uart_xport =
@@ -299,7 +307,8 @@ void n230_resource_manager::_initialize_radio(size_t instance)
}
//Write-only ATR interface
- radio.gpio_atr = gpio_core_200_32wo::make(radio.ctrl, fpga::sr_addr(fpga::SR_RADIO_ATR));
+ radio.gpio_atr = gpio_atr::gpio_atr_3000::make_write_only(radio.ctrl, fpga::sr_addr(fpga::SR_RADIO_ATR));
+ radio.gpio_atr->set_atr_mode(gpio_atr::MODE_ATR,gpio_atr::gpio_atr_3000::MASK_SET_ALL);
//Core VITA time interface
time_core_3000::readback_bases_type time_bases;