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author | Martin Braun <martin.braun@ettus.com> | 2016-10-31 14:30:52 -0700 |
---|---|---|
committer | Martin Braun <martin.braun@ettus.com> | 2016-11-08 08:02:22 -0800 |
commit | 99c2730bc9db270560671f2d7d173768465ed51f (patch) | |
tree | bc4df495734a075ebe2f7917cf67dec6fb7d8177 /host/lib/usrp/e100/clock_ctrl.cpp | |
parent | 218f4b0b63927110df9dbbaa8353c346eee2d98a (diff) | |
download | uhd-99c2730bc9db270560671f2d7d173768465ed51f.tar.gz uhd-99c2730bc9db270560671f2d7d173768465ed51f.tar.bz2 uhd-99c2730bc9db270560671f2d7d173768465ed51f.zip |
Remove all boost:: namespace prefix for uint32_t, int32_t etc. (fixed-width types)
- Also removes all references to boost/cstdint.hpp and replaces it with
stdint.h (The 'correct' replacement would be <cstdint>, but not all of our
compilers support that).
Diffstat (limited to 'host/lib/usrp/e100/clock_ctrl.cpp')
-rw-r--r-- | host/lib/usrp/e100/clock_ctrl.cpp | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/host/lib/usrp/e100/clock_ctrl.cpp b/host/lib/usrp/e100/clock_ctrl.cpp index 9e355ce17..0dbd6a5d3 100644 --- a/host/lib/usrp/e100/clock_ctrl.cpp +++ b/host/lib/usrp/e100/clock_ctrl.cpp @@ -20,7 +20,7 @@ #include <uhd/utils/msg.hpp> #include <uhd/utils/log.hpp> #include <uhd/utils/assert_has.hpp> -#include <boost/cstdint.hpp> +#include <stdint.h> #include "e100_regs.hpp" //spi slave constants #include <boost/assign/list_of.hpp> #include <boost/foreach.hpp> @@ -107,8 +107,8 @@ static clock_settings_type get_clock_settings(double rate){ //X = chan_div * vco_div * R //Y = P*B + A - const boost::uint64_t out_rate = boost::uint64_t(rate); - const boost::uint64_t ref_rate = boost::uint64_t(cs.get_ref_rate()); + const uint64_t out_rate = uint64_t(rate); + const uint64_t ref_rate = uint64_t(cs.get_ref_rate()); const size_t gcd = size_t(boost::math::gcd(ref_rate, out_rate)); for (size_t i = 1; i <= 100; i++){ @@ -436,8 +436,8 @@ public: } bool get_locked(void){ - static const boost::uint8_t addr = 0x01F; - boost::uint32_t reg = _iface->read_spi( + static const uint8_t addr = 0x01F; + uint32_t reg = _iface->read_spi( UE_SPI_SS_AD9522, spi_config_t::EDGE_RISE, _ad9522_regs.get_read_reg(addr), 24 ); @@ -458,8 +458,8 @@ private: this->send_reg(0x232); } - void send_reg(boost::uint16_t addr){ - boost::uint32_t reg = _ad9522_regs.get_write_reg(addr); + void send_reg(uint16_t addr){ + uint32_t reg = _ad9522_regs.get_write_reg(addr); UHD_LOGV(often) << "clock control write reg: " << std::hex << reg << std::endl; _iface->write_spi( UE_SPI_SS_AD9522, @@ -477,10 +477,10 @@ private: this->send_reg(0x18); this->latch_regs(); //wait for calibration done: - static const boost::uint8_t addr = 0x01F; + static const uint8_t addr = 0x01F; for (size_t ms10 = 0; ms10 < 100; ms10++){ boost::this_thread::sleep(boost::posix_time::milliseconds(10)); - boost::uint32_t reg = _iface->read_spi( + uint32_t reg = _iface->read_spi( UE_SPI_SS_AD9522, spi_config_t::EDGE_RISE, _ad9522_regs.get_read_reg(addr), 24 ); @@ -492,7 +492,7 @@ private: //wait for digital lock detect: for (size_t ms10 = 0; ms10 < 100; ms10++){ boost::this_thread::sleep(boost::posix_time::milliseconds(10)); - boost::uint32_t reg = _iface->read_spi( + uint32_t reg = _iface->read_spi( UE_SPI_SS_AD9522, spi_config_t::EDGE_RISE, _ad9522_regs.get_read_reg(addr), 24 ); @@ -513,7 +513,7 @@ private: void send_all_regs(void){ //setup a list of register ranges to write - typedef std::pair<boost::uint16_t, boost::uint16_t> range_t; + typedef std::pair<uint16_t, uint16_t> range_t; static const std::vector<range_t> ranges = boost::assign::list_of (range_t(0x000, 0x000)) (range_t(0x010, 0x01F)) (range_t(0x0F0, 0x0FD)) (range_t(0x190, 0x19B)) @@ -522,7 +522,7 @@ private: //write initial register values and latch/update BOOST_FOREACH(const range_t &range, ranges){ - for(boost::uint16_t addr = range.first; addr <= range.second; addr++){ + for(uint16_t addr = range.first; addr <= range.second; addr++){ this->send_reg(addr); } } |