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| author | Mark Meserve <mark.meserve@ni.com> | 2018-11-07 18:05:56 -0600 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2018-11-07 18:17:32 -0800 |
| commit | e821861383663dec8d56782089f19a0b159d7c9d (patch) | |
| tree | 6e93c1c3c9c6baa86e6ddb287cf9563fa38bb191 /host/lib/usrp/dboard | |
| parent | 342f7aad13671c67e72b6fa2fd8b82142c553e70 (diff) | |
| download | uhd-e821861383663dec8d56782089f19a0b159d7c9d.tar.gz uhd-e821861383663dec8d56782089f19a0b159d7c9d.tar.bz2 uhd-e821861383663dec8d56782089f19a0b159d7c9d.zip | |
rh: initialize switches
Diffstat (limited to 'host/lib/usrp/dboard')
| -rw-r--r-- | host/lib/usrp/dboard/rhodium/rhodium_radio_ctrl_init.cpp | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/host/lib/usrp/dboard/rhodium/rhodium_radio_ctrl_init.cpp b/host/lib/usrp/dboard/rhodium/rhodium_radio_ctrl_init.cpp index 6f7e37c26..a9831f118 100644 --- a/host/lib/usrp/dboard/rhodium/rhodium_radio_ctrl_init.cpp +++ b/host/lib/usrp/dboard/rhodium/rhodium_radio_ctrl_init.cpp @@ -199,9 +199,16 @@ void rhodium_radio_ctrl_impl::_init_peripherals() usrp::gpio_atr::gpio_atr_3000::MASK_SET_ALL ); - // TODO: put this in the right spot - UHD_LOG_TRACE(unique_id(), "Setting Switch 10 to 0x1"); - _gpio->set_gpio_out(0x1, 0x3); + // Updating the TX frequency path may include an update to SW10, which is + // GPIO controlled, so this must follow CPLD and GPIO initialization + UHD_LOG_TRACE(unique_id(), "Writing initial switch values..."); + _update_tx_freq_switches(RHODIUM_DEFAULT_FREQ); + _update_rx_freq_switches(RHODIUM_DEFAULT_FREQ); + + // Antenna setting requires both CPLD and GPIO control + UHD_LOG_TRACE(unique_id(), "Setting initial antenna settings"); + _update_tx_output_switches(RHODIUM_DEFAULT_TX_ANTENNA); + _update_rx_input_switches(RHODIUM_DEFAULT_RX_ANTENNA); _rx_fe_core = rx_frontend_core_3000::make(_get_ctrl(0), regs::sr_addr(RX_FE_BASE)); _rx_fe_core->set_adc_rate(_master_clock_rate); |