uhd: Apply clang-format against all .cpp and .hpp files in host/

Note: template_lvbitx.{cpp,hpp} need to be excluded from the list of
files that clang-format gets applied against.

1 files changed, 184 insertions, 227 deletions

diff --git a/host/lib/usrp/dboard/rhodium/rhodium_cpld_ctrl.cpp b/host/lib/usrp/dboard/rhodium/rhodium_cpld_ctrl.cpp
index 8d294bc48..0617cbd94 100644
--- a/host/lib/usrp/dboard/rhodium/rhodium_cpld_ctrl.cpp
+++ b/host/lib/usrp/dboard/rhodium/rhodium_cpld_ctrl.cpp
@@ -6,8 +6,8 @@
 
 #include "rhodium_cpld_ctrl.hpp"
 #include "rhodium_constants.hpp"
-#include <uhd/utils/math.hpp>
 #include <uhd/utils/log.hpp>
+#include <uhd/utils/math.hpp>
 #include <boost/format.hpp>
 #include <chrono>
 
@@ -15,115 +15,100 @@ using namespace uhd;
 using namespace uhd::math::fp_compare;
 
 namespace {
-    //! Address of the CPLD scratch register
-    constexpr uint8_t CPLD_REGS_SCRATCH = 0x05;
-    //! Address of the CPLD gain table selection register
-    constexpr uint8_t CPLD_REGS_GAIN_TBL_SEL = 0x06;
-
-    constexpr uint32_t MAX_GAIN_INDEX = 60;
-    constexpr uint32_t MAX_LO_GAIN_INDEX = 30;
-
-    //! RX Demodulator Adjustment thresholds
-    constexpr double RX_DEMOD_ADJ_1500OHM_THRESHOLD = 3e9;
-    constexpr double RX_DEMOD_ADJ_200OHM_THRESHOLD = 4.5e9;
-
-    /*
-    Unlike other CPLD fields, gain control doesn't use a register and instead
-    commands are directly sent over SPI. The format of these 24-bit commands is
-    as follows.
-        23:22 Table select (1 = RX, 2 = TX)
-        21:16 Gain index
-        15:14 Reserved
-        13    Write enable for DSA1
-        12:7  Reserved
-        6     Write enable for DSA2
-        5:0   Reserved
-    The CPLD replies with the current attenuation settings as follows, but we
-    ignore this reply in our code.
-        23:13 Reserved
-        12:7  Current attenuator setting for DSA1
-        6     Reserved
-        5:0   Current attenuator setting for DSA2
-    */
-    //! Gain loader constants
-    constexpr size_t GAIN_CTRL_TABLE_FIELD = 22;
-    constexpr size_t GAIN_CTRL_INDEX_FIELD = 16;
-    constexpr size_t GAIN_CTRL_DSA1_FIELD = 13;
-    constexpr size_t GAIN_CTRL_DSA2_FIELD = 6;
-
-    constexpr uint32_t GAIN_CTRL_TABLE_RX = 1;
-    constexpr uint32_t GAIN_CTRL_TABLE_TX = 2;
-    constexpr uint32_t GAIN_CTRL_DSA1_WRITE_ENABLE = 1;
-    constexpr uint32_t GAIN_CTRL_DSA2_WRITE_ENABLE = 1;
-
-    /*
-    Similar to gain control, LO control doesn't use a register and instead
-    commands are directly sent over SPI. The format of these 24-bit commands is
-    as follows:
-        23:22 Table select (Always 3 = LO)
-        21:16 Attenuator setting
-        15:14 Reserved
-        13    Write enable for RX LO DSA
-        12:7  Reserved
-        6     Write enable for TX LO DSA
-        5:0   Reserved
-    The CPLD replies with the current attenuator settings as follows, but we
-    ignore this reply in our code.
-        23:13 Reserved
-        12:7  Current attenuator setting for RX LO DSA
-        6     Reserved
-        5:0   Current attenuator setting for TX LO DSA
-    */
-    //! LO Gain loader constants
-    constexpr size_t LO_GAIN_CTRL_TABLE_FIELD = 22;
-    constexpr size_t LO_GAIN_CTRL_INDEX_FIELD = 16;
-    constexpr size_t LO_GAIN_CTRL_RX_LO_FIELD = 13;
-    constexpr size_t LO_GAIN_CTRL_TX_LO_FIELD = 6;
-
-    constexpr uint32_t LO_GAIN_CTRL_TABLE_LO = 3;
-    constexpr uint32_t LO_GAIN_CTRL_RX_LO_WRITE_ENABLE = 1;
-    constexpr uint32_t LO_GAIN_CTRL_RX_LO_WRITE_DISABLE = 0;
-    constexpr uint32_t LO_GAIN_CTRL_TX_LO_WRITE_ENABLE = 1;
-    constexpr uint32_t LO_GAIN_CTRL_TX_LO_WRITE_DISABLE = 0;
-}
-
-rhodium_cpld_ctrl::rhodium_cpld_ctrl(
-        write_spi_t write_fn,
-        read_spi_t read_fn
-)
+//! Address of the CPLD scratch register
+constexpr uint8_t CPLD_REGS_SCRATCH = 0x05;
+//! Address of the CPLD gain table selection register
+constexpr uint8_t CPLD_REGS_GAIN_TBL_SEL = 0x06;
+
+constexpr uint32_t MAX_GAIN_INDEX    = 60;
+constexpr uint32_t MAX_LO_GAIN_INDEX = 30;
+
+//! RX Demodulator Adjustment thresholds
+constexpr double RX_DEMOD_ADJ_1500OHM_THRESHOLD = 3e9;
+constexpr double RX_DEMOD_ADJ_200OHM_THRESHOLD  = 4.5e9;
+
+/*
+Unlike other CPLD fields, gain control doesn't use a register and instead
+commands are directly sent over SPI. The format of these 24-bit commands is
+as follows.
+    23:22 Table select (1 = RX, 2 = TX)
+    21:16 Gain index
+    15:14 Reserved
+    13    Write enable for DSA1
+    12:7  Reserved
+    6     Write enable for DSA2
+    5:0   Reserved
+The CPLD replies with the current attenuation settings as follows, but we
+ignore this reply in our code.
+    23:13 Reserved
+    12:7  Current attenuator setting for DSA1
+    6     Reserved
+    5:0   Current attenuator setting for DSA2
+*/
+//! Gain loader constants
+constexpr size_t GAIN_CTRL_TABLE_FIELD = 22;
+constexpr size_t GAIN_CTRL_INDEX_FIELD = 16;
+constexpr size_t GAIN_CTRL_DSA1_FIELD  = 13;
+constexpr size_t GAIN_CTRL_DSA2_FIELD  = 6;
+
+constexpr uint32_t GAIN_CTRL_TABLE_RX          = 1;
+constexpr uint32_t GAIN_CTRL_TABLE_TX          = 2;
+constexpr uint32_t GAIN_CTRL_DSA1_WRITE_ENABLE = 1;
+constexpr uint32_t GAIN_CTRL_DSA2_WRITE_ENABLE = 1;
+
+/*
+Similar to gain control, LO control doesn't use a register and instead
+commands are directly sent over SPI. The format of these 24-bit commands is
+as follows:
+    23:22 Table select (Always 3 = LO)
+    21:16 Attenuator setting
+    15:14 Reserved
+    13    Write enable for RX LO DSA
+    12:7  Reserved
+    6     Write enable for TX LO DSA
+    5:0   Reserved
+The CPLD replies with the current attenuator settings as follows, but we
+ignore this reply in our code.
+    23:13 Reserved
+    12:7  Current attenuator setting for RX LO DSA
+    6     Reserved
+    5:0   Current attenuator setting for TX LO DSA
+*/
+//! LO Gain loader constants
+constexpr size_t LO_GAIN_CTRL_TABLE_FIELD = 22;
+constexpr size_t LO_GAIN_CTRL_INDEX_FIELD = 16;
+constexpr size_t LO_GAIN_CTRL_RX_LO_FIELD = 13;
+constexpr size_t LO_GAIN_CTRL_TX_LO_FIELD = 6;
+
+constexpr uint32_t LO_GAIN_CTRL_TABLE_LO            = 3;
+constexpr uint32_t LO_GAIN_CTRL_RX_LO_WRITE_ENABLE  = 1;
+constexpr uint32_t LO_GAIN_CTRL_RX_LO_WRITE_DISABLE = 0;
+constexpr uint32_t LO_GAIN_CTRL_TX_LO_WRITE_ENABLE  = 1;
+constexpr uint32_t LO_GAIN_CTRL_TX_LO_WRITE_DISABLE = 0;
+} // namespace
+
+rhodium_cpld_ctrl::rhodium_cpld_ctrl(write_spi_t write_fn, read_spi_t read_fn)
 {
-    _write_reg_fn = [write_fn](const uint8_t addr, const uint32_t data){
+    _write_reg_fn = [write_fn](const uint8_t addr, const uint32_t data) {
         UHD_LOG_TRACE("RH_CPLD",
-            str(boost::format("Writing to CPLD: 0x%02X -> 0x%04X")
-                % uint32_t(addr) % data));
-        const uint32_t spi_transaction = 0
-            | ((addr & 0x7F) << 17)
-            | data
-        ;
-      UHD_LOG_TRACE("RH_CPLD",
-                    str(boost::format("SPI Transaction: 0x%04X")
-                        % spi_transaction));
+            str(boost::format("Writing to CPLD: 0x%02X -> 0x%04X") % uint32_t(addr)
+                % data));
+        const uint32_t spi_transaction = 0 | ((addr & 0x7F) << 17) | data;
+        UHD_LOG_TRACE(
+            "RH_CPLD", str(boost::format("SPI Transaction: 0x%04X") % spi_transaction));
         write_fn(spi_transaction);
     };
     _write_raw_fn = [write_fn](const uint32_t data) {
-        UHD_LOG_TRACE("RH_CPLD",
-            str(boost::format("Writing to CPLD: 0x%06X")
-                % data));
-        UHD_LOG_TRACE("RH_CPLD",
-            str(boost::format("SPI Transaction: 0x%06X")
-                % data));
+        UHD_LOG_TRACE("RH_CPLD", str(boost::format("Writing to CPLD: 0x%06X") % data));
+        UHD_LOG_TRACE("RH_CPLD", str(boost::format("SPI Transaction: 0x%06X") % data));
         write_fn(data);
     };
-    _read_reg_fn = [read_fn](const uint8_t addr){
+    _read_reg_fn = [read_fn](const uint8_t addr) {
         UHD_LOG_TRACE("RH_CPLD",
-            str(boost::format("Reading from CPLD address 0x%02X")
-                % uint32_t(addr)));
-        const uint32_t spi_transaction = (1<<16)
-            | ((addr & 0x7F) << 17)
-        ;
-      UHD_LOG_TRACE("RH_CPLD",
-                    str(boost::format("SPI Transaction: 0x%04X")
-                        % spi_transaction));
+            str(boost::format("Reading from CPLD address 0x%02X") % uint32_t(addr)));
+        const uint32_t spi_transaction = (1 << 16) | ((addr & 0x7F) << 17);
+        UHD_LOG_TRACE(
+            "RH_CPLD", str(boost::format("SPI Transaction: 0x%04X") % spi_transaction));
         return read_fn(spi_transaction);
     };
 
@@ -162,26 +147,23 @@ uint16_t rhodium_cpld_ctrl::get_scratch()
     return get_reg(CPLD_REGS_SCRATCH);
 }
 
-void rhodium_cpld_ctrl::set_tx_switches(
-    const tx_sw2_t tx_sw2,
+void rhodium_cpld_ctrl::set_tx_switches(const tx_sw2_t tx_sw2,
     const tx_sw3_sw4_t tx_sw3_sw4,
     const tx_sw5_t tx_sw5,
     const tx_hb_lb_sel_t tx_hb_lb_sel,
-    const bool defer_commit
-) {
+    const bool defer_commit)
+{
     UHD_LOG_TRACE("RH_CPLD",
-        "Configuring TX band selection switches."\
-        " sw2=" << tx_sw2 <<
-        " sw3_sw4=" << tx_sw3_sw4 <<
-        " sw5=" << tx_sw5 <<
-        " hb_lb_sel=" << tx_hb_lb_sel
-    );
+        "Configuring TX band selection switches."
+        " sw2="
+            << tx_sw2 << " sw3_sw4=" << tx_sw3_sw4 << " sw5=" << tx_sw5
+            << " hb_lb_sel=" << tx_hb_lb_sel);
 
     std::lock_guard<std::mutex> l(_set_mutex);
 
-    _regs.tx_sw2 = rhodium_cpld_regs_t::tx_sw2_t(tx_sw2);
-    _regs.tx_sw3_sw4 = rhodium_cpld_regs_t::tx_sw3_sw4_t(tx_sw3_sw4);
-    _regs.tx_sw5 = rhodium_cpld_regs_t::tx_sw5_t(tx_sw5);
+    _regs.tx_sw2       = rhodium_cpld_regs_t::tx_sw2_t(tx_sw2);
+    _regs.tx_sw3_sw4   = rhodium_cpld_regs_t::tx_sw3_sw4_t(tx_sw3_sw4);
+    _regs.tx_sw5       = rhodium_cpld_regs_t::tx_sw5_t(tx_sw5);
     _regs.tx_hb_lb_sel = rhodium_cpld_regs_t::tx_hb_lb_sel_t(tx_hb_lb_sel);
 
     if (not defer_commit) {
@@ -189,29 +171,25 @@ void rhodium_cpld_ctrl::set_tx_switches(
     }
 }
 
-void rhodium_cpld_ctrl::set_rx_switches(
-    const rx_sw2_sw7_t rx_sw2_sw7,
+void rhodium_cpld_ctrl::set_rx_switches(const rx_sw2_sw7_t rx_sw2_sw7,
     const rx_sw3_t rx_sw3,
     const rx_sw4_sw5_t rx_sw4_sw5,
     const rx_sw6_t rx_sw6,
     const rx_hb_lb_sel_t rx_hb_lb_sel,
-    const bool defer_commit
-) {
+    const bool defer_commit)
+{
     UHD_LOG_TRACE("RH_CPLD",
-        "Configuring RX band selection switches."\
-        " sw2_sw7=" << rx_sw2_sw7 <<
-        " sw3=" << rx_sw3 <<
-        " sw4_sw5=" << rx_sw4_sw5 <<
-        " sw6=" << rx_sw6 <<
-        " hb_lb_sel=" << rx_hb_lb_sel
-    );
+        "Configuring RX band selection switches."
+        " sw2_sw7="
+            << rx_sw2_sw7 << " sw3=" << rx_sw3 << " sw4_sw5=" << rx_sw4_sw5
+            << " sw6=" << rx_sw6 << " hb_lb_sel=" << rx_hb_lb_sel);
 
     std::lock_guard<std::mutex> l(_set_mutex);
 
-    _regs.rx_sw2_sw7 = rhodium_cpld_regs_t::rx_sw2_sw7_t(rx_sw2_sw7);
-    _regs.rx_sw3 = rhodium_cpld_regs_t::rx_sw3_t(rx_sw3);
-    _regs.rx_sw4_sw5 = rhodium_cpld_regs_t::rx_sw4_sw5_t(rx_sw4_sw5);
-    _regs.rx_sw6 = rhodium_cpld_regs_t::rx_sw6_t(rx_sw6);
+    _regs.rx_sw2_sw7   = rhodium_cpld_regs_t::rx_sw2_sw7_t(rx_sw2_sw7);
+    _regs.rx_sw3       = rhodium_cpld_regs_t::rx_sw3_t(rx_sw3);
+    _regs.rx_sw4_sw5   = rhodium_cpld_regs_t::rx_sw4_sw5_t(rx_sw4_sw5);
+    _regs.rx_sw6       = rhodium_cpld_regs_t::rx_sw6_t(rx_sw6);
     _regs.rx_hb_lb_sel = rhodium_cpld_regs_t::rx_hb_lb_sel_t(rx_hb_lb_sel);
 
     if (not defer_commit) {
@@ -220,19 +198,16 @@ void rhodium_cpld_ctrl::set_rx_switches(
 }
 
 void rhodium_cpld_ctrl::set_rx_input_switches(
-    const rx_sw1_t rx_sw1,
-    const cal_iso_sw_t cal_iso_sw,
-    const bool defer_commit
-) {
+    const rx_sw1_t rx_sw1, const cal_iso_sw_t cal_iso_sw, const bool defer_commit)
+{
     UHD_LOG_TRACE("RH_CPLD",
-        "Configuring RX input selection switches."\
-        " sw1=" << rx_sw1 <<
-        " cal_iso=" << cal_iso_sw
-    );
+        "Configuring RX input selection switches."
+        " sw1="
+            << rx_sw1 << " cal_iso=" << cal_iso_sw);
 
     std::lock_guard<std::mutex> l(_set_mutex);
 
-    _regs.rx_sw1 = rhodium_cpld_regs_t::rx_sw1_t(rx_sw1);
+    _regs.rx_sw1     = rhodium_cpld_regs_t::rx_sw1_t(rx_sw1);
     _regs.cal_iso_sw = rhodium_cpld_regs_t::cal_iso_sw_t(cal_iso_sw);
 
     if (not defer_commit) {
@@ -241,13 +216,12 @@ void rhodium_cpld_ctrl::set_rx_input_switches(
 }
 
 void rhodium_cpld_ctrl::set_tx_output_switches(
-    const tx_sw1_t tx_sw1,
-    const bool defer_commit
-) {
+    const tx_sw1_t tx_sw1, const bool defer_commit)
+{
     UHD_LOG_TRACE("RH_CPLD",
-        "Configuring TX output selection switches."\
-        " sw1=" << tx_sw1
-    );
+        "Configuring TX output selection switches."
+        " sw1="
+            << tx_sw1);
 
     std::lock_guard<std::mutex> l(_set_mutex);
 
@@ -259,9 +233,8 @@ void rhodium_cpld_ctrl::set_tx_output_switches(
 }
 
 void rhodium_cpld_ctrl::set_rx_lo_source(
-    const rx_lo_input_sel_t rx_lo_input_sel,
-    const bool defer_commit
-) {
+    const rx_lo_input_sel_t rx_lo_input_sel, const bool defer_commit)
+{
     UHD_LOG_TRACE("RH_CPLD", "Setting RX LO source to " << rx_lo_input_sel);
     std::lock_guard<std::mutex> l(_set_mutex);
 
@@ -273,9 +246,8 @@ void rhodium_cpld_ctrl::set_rx_lo_source(
 }
 
 void rhodium_cpld_ctrl::set_tx_lo_source(
-    const tx_lo_input_sel_t tx_lo_input_sel,
-    const bool defer_commit
-) {
+    const tx_lo_input_sel_t tx_lo_input_sel, const bool defer_commit)
+{
     UHD_LOG_TRACE("RH_CPLD", "Setting TX LO source to " << tx_lo_input_sel);
     std::lock_guard<std::mutex> l(_set_mutex);
 
@@ -286,29 +258,32 @@ void rhodium_cpld_ctrl::set_tx_lo_source(
     }
 }
 
-void rhodium_cpld_ctrl::set_rx_lo_path(
-    const double freq,
-    const bool defer_commit
-) {
+void rhodium_cpld_ctrl::set_rx_lo_path(const double freq, const bool defer_commit)
+{
     UHD_LOG_TRACE("RH_CPLD", "Configuring RX LO filter and settings. freq=" << freq);
     std::lock_guard<std::mutex> l(_set_mutex);
 
     auto freq_compare = fp_compare_epsilon<double>(freq, RHODIUM_FREQ_COMPARE_EPSILON);
 
     if (freq_compare < RX_DEMOD_ADJ_1500OHM_THRESHOLD) {
-        _regs.rx_demod_adj = rhodium_cpld_regs_t::rx_demod_adj_t::RX_DEMOD_ADJ_RES_1500_OHM;
+        _regs.rx_demod_adj =
+            rhodium_cpld_regs_t::rx_demod_adj_t::RX_DEMOD_ADJ_RES_1500_OHM;
     } else if (freq_compare < RX_DEMOD_ADJ_200OHM_THRESHOLD) {
-        _regs.rx_demod_adj = rhodium_cpld_regs_t::rx_demod_adj_t::RX_DEMOD_ADJ_RES_200_OHM;
+        _regs.rx_demod_adj =
+            rhodium_cpld_regs_t::rx_demod_adj_t::RX_DEMOD_ADJ_RES_200_OHM;
     } else {
         _regs.rx_demod_adj = rhodium_cpld_regs_t::rx_demod_adj_t::RX_DEMOD_ADJ_RES_OPEN;
     }
 
     if (freq_compare < RHODIUM_LO_0_9_GHZ_LPF_THRESHOLD_FREQ) {
-        _regs.rx_lo_filter_sel = rhodium_cpld_regs_t::rx_lo_filter_sel_t::RX_LO_FILTER_SEL_0_9GHZ_LPF;
+        _regs.rx_lo_filter_sel =
+            rhodium_cpld_regs_t::rx_lo_filter_sel_t::RX_LO_FILTER_SEL_0_9GHZ_LPF;
     } else if (freq_compare < RHODIUM_LO_2_25_GHZ_LPF_THRESHOLD_FREQ) {
-        _regs.rx_lo_filter_sel = rhodium_cpld_regs_t::rx_lo_filter_sel_t::RX_LO_FILTER_SEL_2_25GHZ_LPF;
+        _regs.rx_lo_filter_sel =
+            rhodium_cpld_regs_t::rx_lo_filter_sel_t::RX_LO_FILTER_SEL_2_25GHZ_LPF;
     } else {
-        _regs.rx_lo_filter_sel = rhodium_cpld_regs_t::rx_lo_filter_sel_t::RX_LO_FILTER_SEL_5_85GHZ_LPF;
+        _regs.rx_lo_filter_sel =
+            rhodium_cpld_regs_t::rx_lo_filter_sel_t::RX_LO_FILTER_SEL_5_85GHZ_LPF;
     }
 
     if (not defer_commit) {
@@ -316,21 +291,22 @@ void rhodium_cpld_ctrl::set_rx_lo_path(
     }
 }
 
-void rhodium_cpld_ctrl::set_tx_lo_path(
-    const double freq,
-    const bool defer_commit
-) {
+void rhodium_cpld_ctrl::set_tx_lo_path(const double freq, const bool defer_commit)
+{
     UHD_LOG_TRACE("RH_CPLD", "Configuring TX LO filter and settings. freq=" << freq);
     std::lock_guard<std::mutex> l(_set_mutex);
 
     auto freq_compare = fp_compare_epsilon<double>(freq, RHODIUM_FREQ_COMPARE_EPSILON);
 
     if (freq_compare < RHODIUM_LO_0_9_GHZ_LPF_THRESHOLD_FREQ) {
-        _regs.tx_lo_filter_sel = rhodium_cpld_regs_t::tx_lo_filter_sel_t::TX_LO_FILTER_SEL_0_9GHZ_LPF;
+        _regs.tx_lo_filter_sel =
+            rhodium_cpld_regs_t::tx_lo_filter_sel_t::TX_LO_FILTER_SEL_0_9GHZ_LPF;
     } else if (freq_compare < RHODIUM_LO_2_25_GHZ_LPF_THRESHOLD_FREQ) {
-        _regs.tx_lo_filter_sel = rhodium_cpld_regs_t::tx_lo_filter_sel_t::TX_LO_FILTER_SEL_2_25GHZ_LPF;
+        _regs.tx_lo_filter_sel =
+            rhodium_cpld_regs_t::tx_lo_filter_sel_t::TX_LO_FILTER_SEL_2_25GHZ_LPF;
     } else {
-        _regs.tx_lo_filter_sel = rhodium_cpld_regs_t::tx_lo_filter_sel_t::TX_LO_FILTER_SEL_5_85GHZ_LPF;
+        _regs.tx_lo_filter_sel =
+            rhodium_cpld_regs_t::tx_lo_filter_sel_t::TX_LO_FILTER_SEL_5_85GHZ_LPF;
     }
 
     if (not defer_commit) {
@@ -338,43 +314,35 @@ void rhodium_cpld_ctrl::set_tx_lo_path(
     }
 }
 
-void rhodium_cpld_ctrl::set_gain_index(
-    const uint32_t index,
+void rhodium_cpld_ctrl::set_gain_index(const uint32_t index,
     const gain_band_t band,
     const uhd::direction_t dir,
-    const bool defer_commit
-) {
+    const bool defer_commit)
+{
     UHD_ASSERT_THROW(index <= MAX_GAIN_INDEX);
     UHD_ASSERT_THROW(dir == RX_DIRECTION or dir == TX_DIRECTION);
 
-    if (band == HIGH)
-    {
-        if (dir == RX_DIRECTION)
-        {
+    if (band == HIGH) {
+        if (dir == RX_DIRECTION) {
             _regs.rx_gain_tbl_sel = rhodium_cpld_regs_t::RX_GAIN_TBL_SEL_HIGHBAND;
-        }
-        else {
+        } else {
             _regs.tx_gain_tbl_sel = rhodium_cpld_regs_t::TX_GAIN_TBL_SEL_HIGHBAND;
         }
     } else {
-        if (dir == RX_DIRECTION)
-        {
+        if (dir == RX_DIRECTION) {
             _regs.rx_gain_tbl_sel = rhodium_cpld_regs_t::RX_GAIN_TBL_SEL_LOWBAND;
-        }
-        else {
+        } else {
             _regs.tx_gain_tbl_sel = rhodium_cpld_regs_t::TX_GAIN_TBL_SEL_LOWBAND;
         }
     }
 
-    const uint8_t table_id = (dir == RX_DIRECTION) ?
-        GAIN_CTRL_TABLE_RX :
-        GAIN_CTRL_TABLE_TX;
+    const uint8_t table_id = (dir == RX_DIRECTION) ? GAIN_CTRL_TABLE_RX
+                                                   : GAIN_CTRL_TABLE_TX;
 
-    const uint32_t cmd =
-        (table_id                    << GAIN_CTRL_TABLE_FIELD) |
-        (index                       << GAIN_CTRL_INDEX_FIELD) |
-        (GAIN_CTRL_DSA1_WRITE_ENABLE << GAIN_CTRL_DSA1_FIELD) |
-        (GAIN_CTRL_DSA2_WRITE_ENABLE << GAIN_CTRL_DSA2_FIELD);
+    const uint32_t cmd = (table_id << GAIN_CTRL_TABLE_FIELD)
+                         | (index << GAIN_CTRL_INDEX_FIELD)
+                         | (GAIN_CTRL_DSA1_WRITE_ENABLE << GAIN_CTRL_DSA1_FIELD)
+                         | (GAIN_CTRL_DSA2_WRITE_ENABLE << GAIN_CTRL_DSA2_FIELD);
 
     std::lock_guard<std::mutex> l(_set_mutex);
     _gain_queue.emplace_back(cmd);
@@ -385,28 +353,25 @@ void rhodium_cpld_ctrl::set_gain_index(
 }
 
 void rhodium_cpld_ctrl::set_lo_gain(
-    const uint32_t index,
-    const uhd::direction_t dir,
-    const bool defer_commit
-) {
+    const uint32_t index, const uhd::direction_t dir, const bool defer_commit)
+{
     UHD_ASSERT_THROW(index <= MAX_LO_GAIN_INDEX);
 
     // The DSA has 0-30 dB of attenuation in 1 dB steps
     // This index directly controls the attenuation value of the LO DSA,
     // so reverse the gain value to write the value
     const uint32_t attenuation = MAX_LO_GAIN_INDEX - index;
-    const uint8_t set_rx = (dir == RX_DIRECTION or dir == DX_DIRECTION) ?
-        LO_GAIN_CTRL_RX_LO_WRITE_ENABLE :
-        LO_GAIN_CTRL_RX_LO_WRITE_DISABLE;
-    const uint8_t set_tx = (dir == TX_DIRECTION or dir == DX_DIRECTION) ?
-        LO_GAIN_CTRL_TX_LO_WRITE_ENABLE :
-        LO_GAIN_CTRL_TX_LO_WRITE_DISABLE;
-
-    const uint32_t cmd =
-        (LO_GAIN_CTRL_TABLE_LO << LO_GAIN_CTRL_TABLE_FIELD) |
-        (attenuation           << LO_GAIN_CTRL_INDEX_FIELD) |
-        (set_rx                << LO_GAIN_CTRL_RX_LO_FIELD) |
-        (set_tx                << LO_GAIN_CTRL_TX_LO_FIELD);
+    const uint8_t set_rx       = (dir == RX_DIRECTION or dir == DX_DIRECTION)
+                               ? LO_GAIN_CTRL_RX_LO_WRITE_ENABLE
+                               : LO_GAIN_CTRL_RX_LO_WRITE_DISABLE;
+    const uint8_t set_tx = (dir == TX_DIRECTION or dir == DX_DIRECTION)
+                               ? LO_GAIN_CTRL_TX_LO_WRITE_ENABLE
+                               : LO_GAIN_CTRL_TX_LO_WRITE_DISABLE;
+
+    const uint32_t cmd = (LO_GAIN_CTRL_TABLE_LO << LO_GAIN_CTRL_TABLE_FIELD)
+                         | (attenuation << LO_GAIN_CTRL_INDEX_FIELD)
+                         | (set_rx << LO_GAIN_CTRL_RX_LO_FIELD)
+                         | (set_tx << LO_GAIN_CTRL_TX_LO_FIELD);
 
     std::lock_guard<std::mutex> l(_set_mutex);
     _gain_queue.emplace_back(cmd);
@@ -431,9 +396,7 @@ void rhodium_cpld_ctrl::_loopback_test()
     if (actual != random_number) {
         UHD_LOGGER_ERROR("RH_CPLD")
             << "CPLD scratch loopback failed! "
-            << boost::format("Expected: 0x%04X Got: 0x%04X")
-               % random_number % actual
-        ;
+            << boost::format("Expected: 0x%04X Got: 0x%04X") % random_number % actual;
         throw uhd::runtime_error("CPLD scratch loopback failed!");
     }
     UHD_LOG_TRACE("RH_CPLD", "CPLD scratch loopback test passed!");
@@ -442,33 +405,27 @@ void rhodium_cpld_ctrl::_loopback_test()
 void rhodium_cpld_ctrl::commit(const bool save_all)
 {
     UHD_LOGGER_TRACE("RH_CPLD")
-        << "Storing register cache "
-        << (save_all ? "completely" : "selectively")
-        << " to CPLD via SPI..."
-    ;
-    auto changed_addrs = save_all ?
-        _regs.get_all_addrs() :
-        _regs.get_changed_addrs<size_t>();
-    for (const auto addr: changed_addrs) {
+        << "Storing register cache " << (save_all ? "completely" : "selectively")
+        << " to CPLD via SPI...";
+    auto changed_addrs = save_all ? _regs.get_all_addrs()
+                                  : _regs.get_changed_addrs<size_t>();
+    for (const auto addr : changed_addrs) {
         _write_reg_fn(addr, _regs.get_reg(addr));
     }
     _regs.save_state();
     UHD_LOG_TRACE("RH_CPLD",
-        "Storing cache complete: " \
-        "Updated " << changed_addrs.size() << " registers.")
-    ;
+        "Storing cache complete: "
+        "Updated "
+            << changed_addrs.size() << " registers.");
 
-    UHD_LOGGER_TRACE("RH_CPLD")
-        << "Writing queued gain commands "
-        << "to CPLD via SPI..."
-    ;
+    UHD_LOGGER_TRACE("RH_CPLD") << "Writing queued gain commands "
+                                << "to CPLD via SPI...";
     for (const auto cmd : _gain_queue) {
         _write_raw_fn(cmd);
     }
     UHD_LOG_TRACE("RH_CPLD",
-        "Writing queued gain commands complete: " \
-        "Wrote " << _gain_queue.size() << " commands.")
-    ;
+        "Writing queued gain commands complete: "
+        "Wrote "
+            << _gain_queue.size() << " commands.");
     _gain_queue.clear();
 }
-