mg/rh/rfnoc: Harmonize peripheral registers

- Move the SPI addresses out of radio_control_impl
- Fix the GPIO address spaces for N310/N300

2 files changed, 27 insertions, 16 deletions

diff --git a/host/lib/usrp/dboard/magnesium/magnesium_constants.hpp b/host/lib/usrp/dboard/magnesium/magnesium_constants.hpp
index 7d98bca91..3d670e4a3 100644
--- a/host/lib/usrp/dboard/magnesium/magnesium_constants.hpp
+++ b/host/lib/usrp/dboard/magnesium/magnesium_constants.hpp
@@ -94,12 +94,22 @@ static const std::vector<std::string> MAGNESIUM_GP_OPTIONS = {"manual",
 
 namespace n310_regs {
 
-constexpr uint32_t DB_GPIO_BASE = 0x80000; // FIXME
-constexpr uint32_t DB_GPIO_RB = 0x80000; // FIXME
-constexpr uint32_t DB_GPIO_OFFSET = 0x100; // FIXME
-constexpr uint32_t FP_GPIO = 0x80000; // FIXME
-constexpr uint32_t RB_FP_GPIO = 0x80000; // FIXME
-
+static constexpr uint32_t PERIPH_BASE = 0x80000;
+// Space between registers
+static constexpr uint32_t PERIPH_REG_OFFSET = 8;
+// Space between channels on the same dboard
+static constexpr uint32_t CHAN_REG_OFFSET = 0x100 * PERIPH_REG_OFFSET;
+
+// db_control registers
+static constexpr uint32_t SR_MISC_OUTS = PERIPH_BASE + 160 * PERIPH_REG_OFFSET;
+static constexpr uint32_t SR_SPI       = PERIPH_BASE + 168 * PERIPH_REG_OFFSET;
+static constexpr uint32_t SR_FP_GPIO   = PERIPH_BASE + 184 * PERIPH_REG_OFFSET;
+static constexpr uint32_t SR_DB_GPIO   = PERIPH_BASE + 192 * PERIPH_REG_OFFSET;
+
+static constexpr uint32_t RB_MISC_IO = PERIPH_BASE + 16 * PERIPH_REG_OFFSET;
+static constexpr uint32_t RB_SPI     = PERIPH_BASE + 17 * PERIPH_REG_OFFSET;
+static constexpr uint32_t RB_DB_GPIO = PERIPH_BASE + 19 * PERIPH_REG_OFFSET;
+static constexpr uint32_t RB_FP_GPIO = PERIPH_BASE + 20 * PERIPH_REG_OFFSET;
 }
 
 #endif /* INCLUDED_LIBUHD_MAGNESIUM_CONSTANTS_HPP */
diff --git a/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp b/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp
index a1b039079..6e342c79a 100644
--- a/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp
+++ b/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp
@@ -76,11 +76,13 @@ void magnesium_radio_control_impl::_init_peripherals()
     RFNOC_LOG_TRACE("Initializing peripherals...");
     RFNOC_LOG_TRACE("Initializing SPI core...");
     _spi = spi_core_3000::make(
-        [this](uint32_t addr, uint32_t data){ regs().poke32(addr, data, get_command_time(0)); },
-        [this](uint32_t addr){ return regs().peek32(addr, get_command_time(0)); },
-        regmap::REG_SPI_W,
+        [this](uint32_t addr, uint32_t data) {
+            regs().poke32(addr, data, get_command_time(0));
+        },
+        [this](uint32_t addr) { return regs().peek32(addr, get_command_time(0)); },
+        n310_regs::SR_SPI,
         8,
-        regmap::REG_SPI_R);
+        n310_regs::RB_SPI);
     RFNOC_LOG_TRACE("Initializing CPLD...");
     RFNOC_LOG_TRACE("Creating new CPLD object...");
     spi_config_t spi_config;
@@ -117,10 +119,9 @@ void magnesium_radio_control_impl::_init_peripherals()
     for (size_t radio_idx = 0; radio_idx < get_num_input_ports(); radio_idx++) {
         _wb_ifaces.push_back(RFNOC_MAKE_WB_IFACE(0, radio_idx));
         RFNOC_LOG_TRACE("Initializing GPIOs for channel " << radio_idx);
-        _gpio.emplace_back(usrp::gpio_atr::gpio_atr_3000::make(
-                _wb_ifaces.back(),
-                n310_regs::DB_GPIO_BASE + radio_idx * n310_regs::DB_GPIO_OFFSET,
-                n310_regs::DB_GPIO_RB + radio_idx * n310_regs::DB_GPIO_OFFSET));
+        _gpio.emplace_back(usrp::gpio_atr::gpio_atr_3000::make(_wb_ifaces.back(),
+            n310_regs::SR_DB_GPIO + radio_idx * n310_regs::CHAN_REG_OFFSET,
+            n310_regs::RB_DB_GPIO + radio_idx * n310_regs::CHAN_REG_OFFSET));
         // DSA and AD9371 gain bits do *not* toggle on ATR modes. If we ever
         // connect anything else to this core, we might need to set_atr_mode()
         // to MODE_ATR on those bits. For now, all bits simply do what they're
@@ -131,8 +132,8 @@ void magnesium_radio_control_impl::_init_peripherals()
             usrp::gpio_atr::gpio_atr_3000::MASK_SET_ALL);
     }
     RFNOC_LOG_TRACE("Initializing front-panel GPIO control...")
-    _fp_gpio = usrp::gpio_atr::gpio_atr_3000::make(_wb_ifaces.front(),
-        n310_regs::FP_GPIO, n310_regs::RB_FP_GPIO);
+    _fp_gpio = usrp::gpio_atr::gpio_atr_3000::make(
+        _wb_ifaces.front(), n310_regs::SR_FP_GPIO, n310_regs::RB_FP_GPIO);
 }
 
 void magnesium_radio_control_impl::_init_frontend_subtree(