uhd: Apply clang-format against all .cpp and .hpp files in host/

Note: template_lvbitx.{cpp,hpp} need to be excluded from the list of
files that clang-format gets applied against.

19 files changed, 1045 insertions, 878 deletions

diff --git a/host/lib/usrp/cores/dsp_core_utils.cpp b/host/lib/usrp/cores/dsp_core_utils.cpp
index 44885bc6f..a96028d65 100644
--- a/host/lib/usrp/cores/dsp_core_utils.cpp
+++ b/host/lib/usrp/cores/dsp_core_utils.cpp
@@ -5,8 +5,8 @@
 // SPDX-License-Identifier: GPL-3.0-or-later
 //
 
-#include <uhd/utils/math.hpp>
 #include <uhd/exception.hpp>
+#include <uhd/utils/math.hpp>
 #include <uhdlib/usrp/cores/dsp_core_utils.hpp>
 #include <boost/math/special_functions/round.hpp>
 #include <boost/math/special_functions/sign.hpp>
@@ -14,19 +14,18 @@
 static const int32_t MAX_FREQ_WORD = boost::numeric::bounds<int32_t>::highest();
 static const int32_t MIN_FREQ_WORD = boost::numeric::bounds<int32_t>::lowest();
 
-void get_freq_and_freq_word(
-        const double requested_freq,
-        const double tick_rate,
-        double &actual_freq,
-        int32_t &freq_word
-) {
-    //correct for outside of rate (wrap around)
+void get_freq_and_freq_word(const double requested_freq,
+    const double tick_rate,
+    double& actual_freq,
+    int32_t& freq_word)
+{
+    // correct for outside of rate (wrap around)
     double freq = std::fmod(requested_freq, tick_rate);
-    if (std::abs(freq) > tick_rate/2.0)
+    if (std::abs(freq) > tick_rate / 2.0)
         freq -= boost::math::sign(freq) * tick_rate;
 
-    //confirm that the target frequency is within range of the CORDIC
-    UHD_ASSERT_THROW(std::abs(freq) <= tick_rate/2.0);
+    // confirm that the target frequency is within range of the CORDIC
+    UHD_ASSERT_THROW(std::abs(freq) <= tick_rate / 2.0);
 
     /* Now calculate the frequency word. It is possible for this calculation
      * to cause an overflow. As the requested DSP frequency approaches the
@@ -54,11 +53,11 @@ void get_freq_and_freq_word(
     actual_freq = (double(freq_word) / scale_factor) * tick_rate;
 }
 
-std::tuple<double, int> get_freq_and_freq_word(const double requested_freq, const double tick_rate)
+std::tuple<double, int> get_freq_and_freq_word(
+    const double requested_freq, const double tick_rate)
 {
     double actual_freq;
     int32_t freq_word;
     get_freq_and_freq_word(requested_freq, tick_rate, actual_freq, freq_word);
     return std::make_tuple(actual_freq, freq_word);
 }
-
diff --git a/host/lib/usrp/cores/gpio_core_200.cpp b/host/lib/usrp/cores/gpio_core_200.cpp
index 7df8e3c19..7ee0daf70 100644
--- a/host/lib/usrp/cores/gpio_core_200.cpp
+++ b/host/lib/usrp/cores/gpio_core_200.cpp
@@ -8,85 +8,108 @@
 #include <uhd/types/dict.hpp>
 #include <uhdlib/usrp/cores/gpio_core_200.hpp>
 
-#define REG_GPIO_IDLE          _base + 0
-#define REG_GPIO_RX_ONLY       _base + 4
-#define REG_GPIO_TX_ONLY       _base + 8
-#define REG_GPIO_BOTH          _base + 12
-#define REG_GPIO_DDR           _base + 16
+#define REG_GPIO_IDLE _base + 0
+#define REG_GPIO_RX_ONLY _base + 4
+#define REG_GPIO_TX_ONLY _base + 8
+#define REG_GPIO_BOTH _base + 12
+#define REG_GPIO_DDR _base + 16
 
 using namespace uhd;
 using namespace usrp;
 
 template <typename T>
-static void shadow_it(T &shadow, const T &value, const T &mask){
+static void shadow_it(T& shadow, const T& value, const T& mask)
+{
     shadow = (shadow & ~mask) | (value & mask);
 }
 
-gpio_core_200::~gpio_core_200(void){
+gpio_core_200::~gpio_core_200(void)
+{
     /* NOP */
 }
 
-class gpio_core_200_impl : public gpio_core_200{
+class gpio_core_200_impl : public gpio_core_200
+{
 public:
-    gpio_core_200_impl(wb_iface::sptr iface, const size_t base, const size_t rb_addr):
-        _iface(iface), _base(base), _rb_addr(rb_addr), _first_atr(true) { /* NOP */ }
+    gpio_core_200_impl(wb_iface::sptr iface, const size_t base, const size_t rb_addr)
+        : _iface(iface), _base(base), _rb_addr(rb_addr), _first_atr(true)
+    { /* NOP */
+    }
 
-    void set_pin_ctrl(const unit_t unit, const uint16_t value, const uint16_t mask){
-        if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
+    void set_pin_ctrl(const unit_t unit, const uint16_t value, const uint16_t mask)
+    {
+        if (unit == dboard_iface::UNIT_BOTH)
+            throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         shadow_it(_pin_ctrl[unit], value, mask);
-        update(); //full update
+        update(); // full update
     }
 
-    uint16_t get_pin_ctrl(unit_t unit){
-        if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
+    uint16_t get_pin_ctrl(unit_t unit)
+    {
+        if (unit == dboard_iface::UNIT_BOTH)
+            throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         return _pin_ctrl[unit];
     }
 
-    void set_atr_reg(const unit_t unit, const atr_reg_t atr, const uint16_t value, const uint16_t mask){
-        if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
+    void set_atr_reg(
+        const unit_t unit, const atr_reg_t atr, const uint16_t value, const uint16_t mask)
+    {
+        if (unit == dboard_iface::UNIT_BOTH)
+            throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         shadow_it(_atr_regs[unit][atr], value, mask);
-        if (_first_atr)
-        {
+        if (_first_atr) {
             // To preserve legacy behavior, update all registers the first time
             update();
             _first_atr = false;
-        }
-        else
+        } else
             update(atr);
     }
 
-    uint16_t get_atr_reg(unit_t unit, atr_reg_t reg){
-        if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
+    uint16_t get_atr_reg(unit_t unit, atr_reg_t reg)
+    {
+        if (unit == dboard_iface::UNIT_BOTH)
+            throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         return _atr_regs[unit][reg];
     }
 
-    void set_gpio_ddr(const unit_t unit, const uint16_t value, const uint16_t mask){
-        if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
+    void set_gpio_ddr(const unit_t unit, const uint16_t value, const uint16_t mask)
+    {
+        if (unit == dboard_iface::UNIT_BOTH)
+            throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         shadow_it(_gpio_ddr[unit], value, mask);
-        _iface->poke32(REG_GPIO_DDR, //update the 32 bit register
-            (uint32_t(_gpio_ddr[dboard_iface::UNIT_RX]) << shift_by_unit(dboard_iface::UNIT_RX)) |
-            (uint32_t(_gpio_ddr[dboard_iface::UNIT_TX]) << shift_by_unit(dboard_iface::UNIT_TX))
-        );
+        _iface->poke32(REG_GPIO_DDR, // update the 32 bit register
+            (uint32_t(_gpio_ddr[dboard_iface::UNIT_RX])
+                << shift_by_unit(dboard_iface::UNIT_RX))
+                | (uint32_t(_gpio_ddr[dboard_iface::UNIT_TX])
+                      << shift_by_unit(dboard_iface::UNIT_TX)));
     }
 
-    uint16_t get_gpio_ddr(unit_t unit){
-        if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
+    uint16_t get_gpio_ddr(unit_t unit)
+    {
+        if (unit == dboard_iface::UNIT_BOTH)
+            throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         return _gpio_ddr[unit];
     }
 
-    void set_gpio_out(const unit_t unit, const uint16_t value, const uint16_t mask){
-        if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
+    void set_gpio_out(const unit_t unit, const uint16_t value, const uint16_t mask)
+    {
+        if (unit == dboard_iface::UNIT_BOTH)
+            throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         shadow_it(_gpio_out[unit], value, mask);
-        this->update(); //full update
+        this->update(); // full update
     }
 
-    uint16_t get_gpio_out(unit_t unit){
-        if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
+    uint16_t get_gpio_out(unit_t unit)
+    {
+        if (unit == dboard_iface::UNIT_BOTH)
+            throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         return _gpio_out[unit];
     }
 
-    uint16_t read_gpio(const unit_t unit){
-        if (unit == dboard_iface::UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
+    uint16_t read_gpio(const unit_t unit)
+    {
+        if (unit == dboard_iface::UNIT_BOTH)
+            throw uhd::runtime_error("UNIT_BOTH not supported in gpio_core_200");
         return uint16_t(_iface->peek32(_rb_addr) >> shift_by_unit(unit));
     }
 
@@ -98,81 +121,90 @@ private:
     uhd::dict<size_t, uint32_t> _update_cache;
 
     uhd::dict<unit_t, uint16_t> _pin_ctrl, _gpio_out, _gpio_ddr;
-    uhd::dict<unit_t, uhd::dict<atr_reg_t, uint16_t> > _atr_regs;
+    uhd::dict<unit_t, uhd::dict<atr_reg_t, uint16_t>> _atr_regs;
 
-    unsigned shift_by_unit(const unit_t unit){
-        return (unit == dboard_iface::UNIT_RX)? 0 : 16;
+    unsigned shift_by_unit(const unit_t unit)
+    {
+        return (unit == dboard_iface::UNIT_RX) ? 0 : 16;
     }
 
-    void update(void){
+    void update(void)
+    {
         update(gpio_atr::ATR_REG_IDLE);
         update(gpio_atr::ATR_REG_TX_ONLY);
         update(gpio_atr::ATR_REG_RX_ONLY);
         update(gpio_atr::ATR_REG_FULL_DUPLEX);
     }
 
-    void update(const atr_reg_t atr){
+    void update(const atr_reg_t atr)
+    {
         size_t addr;
-        switch (atr)
-        {
-        case gpio_atr::ATR_REG_IDLE:
-            addr = REG_GPIO_IDLE;
-            break;
-        case gpio_atr::ATR_REG_TX_ONLY:
-            addr = REG_GPIO_TX_ONLY;
-            break;
-        case gpio_atr::ATR_REG_RX_ONLY:
-            addr = REG_GPIO_RX_ONLY;
-            break;
-        case gpio_atr::ATR_REG_FULL_DUPLEX:
-            addr = REG_GPIO_BOTH;
-            break;
-        default:
-            UHD_THROW_INVALID_CODE_PATH();
+        switch (atr) {
+            case gpio_atr::ATR_REG_IDLE:
+                addr = REG_GPIO_IDLE;
+                break;
+            case gpio_atr::ATR_REG_TX_ONLY:
+                addr = REG_GPIO_TX_ONLY;
+                break;
+            case gpio_atr::ATR_REG_RX_ONLY:
+                addr = REG_GPIO_RX_ONLY;
+                break;
+            case gpio_atr::ATR_REG_FULL_DUPLEX:
+                addr = REG_GPIO_BOTH;
+                break;
+            default:
+                UHD_THROW_INVALID_CODE_PATH();
         }
-        const uint32_t atr_val =
-            (uint32_t(_atr_regs[dboard_iface::UNIT_RX][atr]) << shift_by_unit(dboard_iface::UNIT_RX)) |
-            (uint32_t(_atr_regs[dboard_iface::UNIT_TX][atr]) << shift_by_unit(dboard_iface::UNIT_TX));
-
-        const uint32_t gpio_val =
-            (uint32_t(_gpio_out[dboard_iface::UNIT_RX]) << shift_by_unit(dboard_iface::UNIT_RX)) |
-            (uint32_t(_gpio_out[dboard_iface::UNIT_TX]) << shift_by_unit(dboard_iface::UNIT_TX));
-
-        const uint32_t ctrl =
-            (uint32_t(_pin_ctrl[dboard_iface::UNIT_RX]) << shift_by_unit(dboard_iface::UNIT_RX)) |
-            (uint32_t(_pin_ctrl[dboard_iface::UNIT_TX]) << shift_by_unit(dboard_iface::UNIT_TX));
+        const uint32_t atr_val = (uint32_t(_atr_regs[dboard_iface::UNIT_RX][atr])
+                                     << shift_by_unit(dboard_iface::UNIT_RX))
+                                 | (uint32_t(_atr_regs[dboard_iface::UNIT_TX][atr])
+                                       << shift_by_unit(dboard_iface::UNIT_TX));
+
+        const uint32_t gpio_val = (uint32_t(_gpio_out[dboard_iface::UNIT_RX])
+                                      << shift_by_unit(dboard_iface::UNIT_RX))
+                                  | (uint32_t(_gpio_out[dboard_iface::UNIT_TX])
+                                        << shift_by_unit(dboard_iface::UNIT_TX));
+
+        const uint32_t ctrl = (uint32_t(_pin_ctrl[dboard_iface::UNIT_RX])
+                                  << shift_by_unit(dboard_iface::UNIT_RX))
+                              | (uint32_t(_pin_ctrl[dboard_iface::UNIT_TX])
+                                    << shift_by_unit(dboard_iface::UNIT_TX));
         const uint32_t val = (ctrl & atr_val) | ((~ctrl) & gpio_val);
-        if (not _update_cache.has_key(addr) or _update_cache[addr] != val)
-        {
+        if (not _update_cache.has_key(addr) or _update_cache[addr] != val) {
             _iface->poke32(addr, val);
         }
         _update_cache[addr] = val;
     }
-
 };
 
-gpio_core_200::sptr gpio_core_200::make(wb_iface::sptr iface, const size_t base, const size_t rb_addr){
+gpio_core_200::sptr gpio_core_200::make(
+    wb_iface::sptr iface, const size_t base, const size_t rb_addr)
+{
     return sptr(new gpio_core_200_impl(iface, base, rb_addr));
 }
 
-gpio_core_200_32wo::~gpio_core_200_32wo(void){
+gpio_core_200_32wo::~gpio_core_200_32wo(void)
+{
     /* NOP */
 }
 
-class gpio_core_200_32wo_impl : public gpio_core_200_32wo{
+class gpio_core_200_32wo_impl : public gpio_core_200_32wo
+{
 public:
-    gpio_core_200_32wo_impl(wb_iface::sptr iface, const size_t base):
-        _iface(iface), _base(base)
+    gpio_core_200_32wo_impl(wb_iface::sptr iface, const size_t base)
+        : _iface(iface), _base(base)
     {
         set_ddr_reg();
     }
 
-    void set_ddr_reg(){
+    void set_ddr_reg()
+    {
         _iface->poke32(REG_GPIO_DDR, 0xffffffff);
     }
 
 
-    void set_atr_reg(const atr_reg_t atr, const uint32_t value){
+    void set_atr_reg(const atr_reg_t atr, const uint32_t value)
+    {
         if (atr == gpio_atr::ATR_REG_IDLE)
             _iface->poke32(REG_GPIO_IDLE, value);
         else if (atr == gpio_atr::ATR_REG_TX_ONLY)
@@ -185,19 +217,20 @@ public:
             UHD_THROW_INVALID_CODE_PATH();
     }
 
-    void set_all_regs(const uint32_t value){
-        set_atr_reg(gpio_atr::ATR_REG_IDLE,        value);
-        set_atr_reg(gpio_atr::ATR_REG_TX_ONLY,     value);
-        set_atr_reg(gpio_atr::ATR_REG_RX_ONLY,     value);
+    void set_all_regs(const uint32_t value)
+    {
+        set_atr_reg(gpio_atr::ATR_REG_IDLE, value);
+        set_atr_reg(gpio_atr::ATR_REG_TX_ONLY, value);
+        set_atr_reg(gpio_atr::ATR_REG_RX_ONLY, value);
         set_atr_reg(gpio_atr::ATR_REG_FULL_DUPLEX, value);
     }
 
 private:
     wb_iface::sptr _iface;
     const size_t _base;
-
 };
 
-gpio_core_200_32wo::sptr gpio_core_200_32wo::make(wb_iface::sptr iface, const size_t base){
+gpio_core_200_32wo::sptr gpio_core_200_32wo::make(wb_iface::sptr iface, const size_t base)
+{
     return sptr(new gpio_core_200_32wo_impl(iface, base));
 }
diff --git a/host/lib/usrp/cores/i2c_core_100_wb32.cpp b/host/lib/usrp/cores/i2c_core_100_wb32.cpp
index ec47aa8f0..d3d0a135a 100644
--- a/host/lib/usrp/cores/i2c_core_100_wb32.cpp
+++ b/host/lib/usrp/cores/i2c_core_100_wb32.cpp
@@ -13,67 +13,69 @@
 
 #define REG_I2C_PRESCALER_LO _base + 0
 #define REG_I2C_PRESCALER_HI _base + 4
-#define REG_I2C_CTRL         _base + 8
-#define REG_I2C_DATA         _base + 12
-#define REG_I2C_CMD_STATUS   _base + 16
+#define REG_I2C_CTRL _base + 8
+#define REG_I2C_DATA _base + 12
+#define REG_I2C_CMD_STATUS _base + 16
 
 //
 // STA, STO, RD, WR, and IACK bits are cleared automatically
 //
 
-#define	I2C_CTRL_EN	(1 << 7)	// core enable
-#define	I2C_CTRL_IE	(1 << 6)	// interrupt enable
-
-#define	I2C_CMD_START	(1 << 7)	// generate (repeated) start condition
-#define I2C_CMD_STOP	(1 << 6)	// generate stop condition
-#define	I2C_CMD_RD	(1 << 5)	// read from slave
-#define I2C_CMD_WR	(1 << 4)	// write to slave
-#define	I2C_CMD_NACK	(1 << 3)	// when a rcvr, send ACK (ACK=0) or NACK (ACK=1)
-#define I2C_CMD_RSVD_2	(1 << 2)	// reserved
-#define	I2C_CMD_RSVD_1	(1 << 1)	// reserved
-#define I2C_CMD_IACK	(1 << 0)	// set to clear pending interrupt
-
-#define I2C_ST_RXACK	(1 << 7)	// Received acknowledgement from slave (1 = NAK, 0 = ACK)
-#define	I2C_ST_BUSY	(1 << 6)	// 1 after START signal detected; 0 after STOP signal detected
-#define	I2C_ST_AL	(1 << 5)	// Arbitration lost.  1 when core lost arbitration
-#define	I2C_ST_RSVD_4	(1 << 4)	// reserved
-#define	I2C_ST_RSVD_3	(1 << 3)	// reserved
-#define	I2C_ST_RSVD_2	(1 << 2)	// reserved
-#define I2C_ST_TIP	(1 << 1)	// Transfer-in-progress
-#define	I2C_ST_IP	(1 << 0)	// Interrupt pending
+#define I2C_CTRL_EN (1 << 7) // core enable
+#define I2C_CTRL_IE (1 << 6) // interrupt enable
+
+#define I2C_CMD_START (1 << 7) // generate (repeated) start condition
+#define I2C_CMD_STOP (1 << 6) // generate stop condition
+#define I2C_CMD_RD (1 << 5) // read from slave
+#define I2C_CMD_WR (1 << 4) // write to slave
+#define I2C_CMD_NACK (1 << 3) // when a rcvr, send ACK (ACK=0) or NACK (ACK=1)
+#define I2C_CMD_RSVD_2 (1 << 2) // reserved
+#define I2C_CMD_RSVD_1 (1 << 1) // reserved
+#define I2C_CMD_IACK (1 << 0) // set to clear pending interrupt
+
+#define I2C_ST_RXACK (1 << 7) // Received acknowledgement from slave (1 = NAK, 0 = ACK)
+#define I2C_ST_BUSY \
+    (1 << 6) // 1 after START signal detected; 0 after STOP signal detected
+#define I2C_ST_AL (1 << 5) // Arbitration lost.  1 when core lost arbitration
+#define I2C_ST_RSVD_4 (1 << 4) // reserved
+#define I2C_ST_RSVD_3 (1 << 3) // reserved
+#define I2C_ST_RSVD_2 (1 << 2) // reserved
+#define I2C_ST_TIP (1 << 1) // Transfer-in-progress
+#define I2C_ST_IP (1 << 0) // Interrupt pending
 
 using namespace uhd;
 
-i2c_core_100_wb32::~i2c_core_100_wb32(void){
+i2c_core_100_wb32::~i2c_core_100_wb32(void)
+{
     /* NOP */
 }
 
-class i2c_core_100_wb32_wb32_impl : public i2c_core_100_wb32{
+class i2c_core_100_wb32_wb32_impl : public i2c_core_100_wb32
+{
 public:
-    i2c_core_100_wb32_wb32_impl(wb_iface::sptr iface, const size_t base):
-        _iface(iface), _base(base)
+    i2c_core_100_wb32_wb32_impl(wb_iface::sptr iface, const size_t base)
+        : _iface(iface), _base(base)
     {
-        //init I2C FPGA interface.
+        // init I2C FPGA interface.
         _iface->poke32(REG_I2C_CTRL, 0x0000);
-        _iface->poke32(REG_I2C_CTRL, I2C_CTRL_EN); //enable I2C core
+        _iface->poke32(REG_I2C_CTRL, I2C_CTRL_EN); // enable I2C core
     }
 
     void set_clock_rate(const double rate)
     {
         static const uint32_t i2c_datarate = 400000;
-        uint16_t prescaler = uint16_t(rate / (i2c_datarate*5) - 1);
+        uint16_t prescaler                 = uint16_t(rate / (i2c_datarate * 5) - 1);
         _iface->poke32(REG_I2C_PRESCALER_LO, prescaler & 0xFF);
         _iface->poke32(REG_I2C_PRESCALER_HI, (prescaler >> 8) & 0xFF);
     }
 
-    void write_i2c(
-        uint16_t addr,
-        const byte_vector_t &bytes
-    ){
-        _iface->poke32(REG_I2C_DATA, (addr << 1) | 0); //addr and read bit (0)
-        _iface->poke32(REG_I2C_CMD_STATUS, I2C_CMD_WR | I2C_CMD_START | (bytes.size() == 0 ? I2C_CMD_STOP : 0));
+    void write_i2c(uint16_t addr, const byte_vector_t& bytes)
+    {
+        _iface->poke32(REG_I2C_DATA, (addr << 1) | 0); // addr and read bit (0)
+        _iface->poke32(REG_I2C_CMD_STATUS,
+            I2C_CMD_WR | I2C_CMD_START | (bytes.size() == 0 ? I2C_CMD_STOP : 0));
 
-        //wait for previous transfer to complete
+        // wait for previous transfer to complete
         if (not wait_chk_ack()) {
             _iface->poke32(REG_I2C_CMD_STATUS, I2C_CMD_STOP);
             return;
@@ -81,41 +83,42 @@ public:
 
         for (size_t i = 0; i < bytes.size(); i++) {
             _iface->poke32(REG_I2C_DATA, bytes[i]);
-            _iface->poke32(REG_I2C_CMD_STATUS, I2C_CMD_WR | ((i == (bytes.size() - 1)) ? I2C_CMD_STOP : 0));
-            if(!wait_chk_ack()) {
+            _iface->poke32(REG_I2C_CMD_STATUS,
+                I2C_CMD_WR | ((i == (bytes.size() - 1)) ? I2C_CMD_STOP : 0));
+            if (!wait_chk_ack()) {
                 _iface->poke32(REG_I2C_CMD_STATUS, I2C_CMD_STOP);
                 return;
             }
         }
     }
 
-    byte_vector_t read_i2c(
-        uint16_t addr,
-        size_t num_bytes
-    ){
+    byte_vector_t read_i2c(uint16_t addr, size_t num_bytes)
+    {
         byte_vector_t bytes;
-        if (num_bytes == 0) return bytes;
+        if (num_bytes == 0)
+            return bytes;
 
-        while (_iface->peek32(REG_I2C_CMD_STATUS) & I2C_ST_BUSY){
+        while (_iface->peek32(REG_I2C_CMD_STATUS) & I2C_ST_BUSY) {
             /* NOP */
         }
 
-        _iface->poke32(REG_I2C_DATA, (addr << 1) | 1); //addr and read bit (1)
+        _iface->poke32(REG_I2C_DATA, (addr << 1) | 1); // addr and read bit (1)
         _iface->poke32(REG_I2C_CMD_STATUS, I2C_CMD_WR | I2C_CMD_START);
-        //wait for previous transfer to complete
+        // wait for previous transfer to complete
         if (not wait_chk_ack()) {
             _iface->poke32(REG_I2C_CMD_STATUS, I2C_CMD_STOP);
         }
         for (size_t i = 0; i < num_bytes; i++) {
-            _iface->poke32(REG_I2C_CMD_STATUS, I2C_CMD_RD | ((num_bytes == i+1) ? (I2C_CMD_STOP | I2C_CMD_NACK) : 0));
+            _iface->poke32(REG_I2C_CMD_STATUS,
+                I2C_CMD_RD | ((num_bytes == i + 1) ? (I2C_CMD_STOP | I2C_CMD_NACK) : 0));
             i2c_wait();
             bytes.push_back(uint8_t(_iface->peek32(REG_I2C_DATA)));
         }
         return bytes;
     }
 
-    //override read_eeprom so we can write once, read all N bytes
-    //the default implementation calls read i2c once per byte
+    // override read_eeprom so we can write once, read all N bytes
+    // the default implementation calls read i2c once per byte
     byte_vector_t read_eeprom(uint16_t addr, uint16_t offset, size_t num_bytes)
     {
         this->write_i2c(addr, byte_vector_t(1, uint8_t(offset)));
@@ -123,16 +126,18 @@ public:
     }
 
 private:
-    void i2c_wait(void) {
-        for (size_t i = 0; i < 10; i++)
-        {
-            if ((_iface->peek32(REG_I2C_CMD_STATUS) & I2C_ST_TIP) == 0) return;
+    void i2c_wait(void)
+    {
+        for (size_t i = 0; i < 10; i++) {
+            if ((_iface->peek32(REG_I2C_CMD_STATUS) & I2C_ST_TIP) == 0)
+                return;
             std::this_thread::sleep_for(std::chrono::milliseconds(1));
         }
-        UHD_LOGGER_ERROR("CORES") << "i2c_core_100_wb32: i2c_wait timeout" ;
+        UHD_LOGGER_ERROR("CORES") << "i2c_core_100_wb32: i2c_wait timeout";
     }
 
-    bool wait_chk_ack(void){
+    bool wait_chk_ack(void)
+    {
         i2c_wait();
         return (_iface->peek32(REG_I2C_CMD_STATUS) & I2C_ST_RXACK) == 0;
     }
diff --git a/host/lib/usrp/cores/i2c_core_200.cpp b/host/lib/usrp/cores/i2c_core_200.cpp
index 4278bf611..431ba194c 100644
--- a/host/lib/usrp/cores/i2c_core_200.cpp
+++ b/host/lib/usrp/cores/i2c_core_200.cpp
@@ -14,67 +14,69 @@
 
 #define REG_I2C_WR_PRESCALER_LO (1 << 3) | 0
 #define REG_I2C_WR_PRESCALER_HI (1 << 3) | 1
-#define REG_I2C_WR_CTRL         (1 << 3) | 2
-#define REG_I2C_WR_DATA         (1 << 3) | 3
-#define REG_I2C_WR_CMD          (1 << 3) | 4
-#define REG_I2C_RD_DATA         (0 << 3) | 3
-#define REG_I2C_RD_ST           (0 << 3) | 4
+#define REG_I2C_WR_CTRL (1 << 3) | 2
+#define REG_I2C_WR_DATA (1 << 3) | 3
+#define REG_I2C_WR_CMD (1 << 3) | 4
+#define REG_I2C_RD_DATA (0 << 3) | 3
+#define REG_I2C_RD_ST (0 << 3) | 4
 
 //
 // STA, STO, RD, WR, and IACK bits are cleared automatically
 //
 
-#define	I2C_CTRL_EN	(1 << 7)	// core enable
-#define	I2C_CTRL_IE	(1 << 6)	// interrupt enable
-
-#define	I2C_CMD_START	(1 << 7)	// generate (repeated) start condition
-#define I2C_CMD_STOP	(1 << 6)	// generate stop condition
-#define	I2C_CMD_RD	(1 << 5)	// read from slave
-#define I2C_CMD_WR	(1 << 4)	// write to slave
-#define	I2C_CMD_NACK	(1 << 3)	// when a rcvr, send ACK (ACK=0) or NACK (ACK=1)
-#define I2C_CMD_RSVD_2	(1 << 2)	// reserved
-#define	I2C_CMD_RSVD_1	(1 << 1)	// reserved
-#define I2C_CMD_IACK	(1 << 0)	// set to clear pending interrupt
-
-#define I2C_ST_RXACK	(1 << 7)	// Received acknowledgement from slave (1 = NAK, 0 = ACK)
-#define	I2C_ST_BUSY	(1 << 6)	// 1 after START signal detected; 0 after STOP signal detected
-#define	I2C_ST_AL	(1 << 5)	// Arbitration lost.  1 when core lost arbitration
-#define	I2C_ST_RSVD_4	(1 << 4)	// reserved
-#define	I2C_ST_RSVD_3	(1 << 3)	// reserved
-#define	I2C_ST_RSVD_2	(1 << 2)	// reserved
-#define I2C_ST_TIP	(1 << 1)	// Transfer-in-progress
-#define	I2C_ST_IP	(1 << 0)	// Interrupt pending
+#define I2C_CTRL_EN (1 << 7) // core enable
+#define I2C_CTRL_IE (1 << 6) // interrupt enable
+
+#define I2C_CMD_START (1 << 7) // generate (repeated) start condition
+#define I2C_CMD_STOP (1 << 6) // generate stop condition
+#define I2C_CMD_RD (1 << 5) // read from slave
+#define I2C_CMD_WR (1 << 4) // write to slave
+#define I2C_CMD_NACK (1 << 3) // when a rcvr, send ACK (ACK=0) or NACK (ACK=1)
+#define I2C_CMD_RSVD_2 (1 << 2) // reserved
+#define I2C_CMD_RSVD_1 (1 << 1) // reserved
+#define I2C_CMD_IACK (1 << 0) // set to clear pending interrupt
+
+#define I2C_ST_RXACK (1 << 7) // Received acknowledgement from slave (1 = NAK, 0 = ACK)
+#define I2C_ST_BUSY \
+    (1 << 6) // 1 after START signal detected; 0 after STOP signal detected
+#define I2C_ST_AL (1 << 5) // Arbitration lost.  1 when core lost arbitration
+#define I2C_ST_RSVD_4 (1 << 4) // reserved
+#define I2C_ST_RSVD_3 (1 << 3) // reserved
+#define I2C_ST_RSVD_2 (1 << 2) // reserved
+#define I2C_ST_TIP (1 << 1) // Transfer-in-progress
+#define I2C_ST_IP (1 << 0) // Interrupt pending
 
 using namespace uhd;
 
-i2c_core_200::~i2c_core_200(void){
+i2c_core_200::~i2c_core_200(void)
+{
     /* NOP */
 }
 
-class i2c_core_200_impl : public i2c_core_200{
+class i2c_core_200_impl : public i2c_core_200
+{
 public:
-    i2c_core_200_impl(wb_iface::sptr iface, const size_t base, const size_t readback):
-        _iface(iface), _base(base), _readback(readback)
+    i2c_core_200_impl(wb_iface::sptr iface, const size_t base, const size_t readback)
+        : _iface(iface), _base(base), _readback(readback)
     {
-        //init I2C FPGA interface.
+        // init I2C FPGA interface.
         this->poke(REG_I2C_WR_CTRL, 0x0000);
-        //set prescalers to operate at 400kHz: WB_CLK is 64MHz...
+        // set prescalers to operate at 400kHz: WB_CLK is 64MHz...
         static const uint32_t i2c_datarate = 400000;
-        static const uint32_t wishbone_clk = 64000000; //FIXME should go somewhere else
-        uint16_t prescaler = wishbone_clk / (i2c_datarate*5) - 1;
+        static const uint32_t wishbone_clk = 64000000; // FIXME should go somewhere else
+        uint16_t prescaler                 = wishbone_clk / (i2c_datarate * 5) - 1;
         this->poke(REG_I2C_WR_PRESCALER_LO, prescaler & 0xFF);
         this->poke(REG_I2C_WR_PRESCALER_HI, (prescaler >> 8) & 0xFF);
-        this->poke(REG_I2C_WR_CTRL, I2C_CTRL_EN); //enable I2C core
+        this->poke(REG_I2C_WR_CTRL, I2C_CTRL_EN); // enable I2C core
     }
 
-    void write_i2c(
-        uint16_t addr,
-        const byte_vector_t &bytes
-    ){
-        this->poke(REG_I2C_WR_DATA, (addr << 1) | 0); //addr and read bit (0)
-        this->poke(REG_I2C_WR_CMD, I2C_CMD_WR | I2C_CMD_START | (bytes.size() == 0 ? I2C_CMD_STOP : 0));
+    void write_i2c(uint16_t addr, const byte_vector_t& bytes)
+    {
+        this->poke(REG_I2C_WR_DATA, (addr << 1) | 0); // addr and read bit (0)
+        this->poke(REG_I2C_WR_CMD,
+            I2C_CMD_WR | I2C_CMD_START | (bytes.size() == 0 ? I2C_CMD_STOP : 0));
 
-        //wait for previous transfer to complete
+        // wait for previous transfer to complete
         if (not wait_chk_ack()) {
             this->poke(REG_I2C_WR_CMD, I2C_CMD_STOP);
             return;
@@ -82,33 +84,34 @@ public:
 
         for (size_t i = 0; i < bytes.size(); i++) {
             this->poke(REG_I2C_WR_DATA, bytes[i]);
-            this->poke(REG_I2C_WR_CMD, I2C_CMD_WR | ((i == (bytes.size() - 1)) ? I2C_CMD_STOP : 0));
-            if(!wait_chk_ack()) {
+            this->poke(REG_I2C_WR_CMD,
+                I2C_CMD_WR | ((i == (bytes.size() - 1)) ? I2C_CMD_STOP : 0));
+            if (!wait_chk_ack()) {
                 this->poke(REG_I2C_WR_CMD, I2C_CMD_STOP);
                 return;
             }
         }
     }
 
-    byte_vector_t read_i2c(
-        uint16_t addr,
-        size_t num_bytes
-    ){
+    byte_vector_t read_i2c(uint16_t addr, size_t num_bytes)
+    {
         byte_vector_t bytes;
-        if (num_bytes == 0) return bytes;
+        if (num_bytes == 0)
+            return bytes;
 
-        while (this->peek(REG_I2C_RD_ST) & I2C_ST_BUSY){
+        while (this->peek(REG_I2C_RD_ST) & I2C_ST_BUSY) {
             /* NOP */
         }
 
-        this->poke(REG_I2C_WR_DATA, (addr << 1) | 1); //addr and read bit (1)
+        this->poke(REG_I2C_WR_DATA, (addr << 1) | 1); // addr and read bit (1)
         this->poke(REG_I2C_WR_CMD, I2C_CMD_WR | I2C_CMD_START);
-        //wait for previous transfer to complete
+        // wait for previous transfer to complete
         if (not wait_chk_ack()) {
             this->poke(REG_I2C_WR_CMD, I2C_CMD_STOP);
         }
         for (size_t i = 0; i < num_bytes; i++) {
-            this->poke(REG_I2C_WR_CMD, I2C_CMD_RD | ((num_bytes == i+1) ? (I2C_CMD_STOP | I2C_CMD_NACK) : 0));
+            this->poke(REG_I2C_WR_CMD,
+                I2C_CMD_RD | ((num_bytes == i + 1) ? (I2C_CMD_STOP | I2C_CMD_NACK) : 0));
             i2c_wait();
             bytes.push_back(this->peek(REG_I2C_RD_DATA));
         }
@@ -116,15 +119,18 @@ public:
     }
 
 private:
-    void i2c_wait(void) {
-        for (size_t i = 0; i < 100; i++){
-            if ((this->peek(REG_I2C_RD_ST) & I2C_ST_TIP) == 0) return;
+    void i2c_wait(void)
+    {
+        for (size_t i = 0; i < 100; i++) {
+            if ((this->peek(REG_I2C_RD_ST) & I2C_ST_TIP) == 0)
+                return;
             std::this_thread::sleep_for(std::chrono::milliseconds(1));
         }
-        UHD_LOGGER_ERROR("CORES") << "i2c_core_200: i2c_wait timeout" ;
+        UHD_LOGGER_ERROR("CORES") << "i2c_core_200: i2c_wait timeout";
     }
 
-    bool wait_chk_ack(void){
+    bool wait_chk_ack(void)
+    {
         i2c_wait();
         return (this->peek(REG_I2C_RD_ST) & I2C_ST_RXACK) == 0;
     }
@@ -148,6 +154,8 @@ private:
     boost::mutex _mutex;
 };
 
-i2c_core_200::sptr i2c_core_200::make(wb_iface::sptr iface, const size_t base, const size_t readback){
+i2c_core_200::sptr i2c_core_200::make(
+    wb_iface::sptr iface, const size_t base, const size_t readback)
+{
     return sptr(new i2c_core_200_impl(iface, base, readback));
 }
diff --git a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
index 15226e8c4..7518bfe6f 100644
--- a/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
+++ b/host/lib/usrp/cores/radio_ctrl_core_3000.cpp
@@ -6,16 +6,16 @@
 //
 
 #include <uhd/exception.hpp>
-#include <uhd/utils/log.hpp>
-#include <uhd/utils/byteswap.hpp>
-#include <uhd/utils/safe_call.hpp>
 #include <uhd/transport/bounded_buffer.hpp>
 #include <uhd/transport/vrt_if_packet.hpp>
+#include <uhd/utils/byteswap.hpp>
+#include <uhd/utils/log.hpp>
+#include <uhd/utils/safe_call.hpp>
 #include <uhdlib/usrp/common/async_packet_handler.hpp>
 #include <uhdlib/usrp/cores/radio_ctrl_core_3000.hpp>
+#include <boost/format.hpp>
 #include <boost/thread/mutex.hpp>
 #include <boost/thread/thread.hpp>
-#include <boost/format.hpp>
 #include <functional>
 #include <queue>
 
@@ -23,43 +23,49 @@ using namespace uhd;
 using namespace uhd::usrp;
 using namespace uhd::transport;
 
-static const double ACK_TIMEOUT = 2.0; //supposed to be worst case practical timeout
-static const double MASSIVE_TIMEOUT = 10.0; //for when we wait on a timed command
+static const double ACK_TIMEOUT     = 2.0; // supposed to be worst case practical timeout
+static const double MASSIVE_TIMEOUT = 10.0; // for when we wait on a timed command
 static const size_t SR_READBACK = 32;
 
-radio_ctrl_core_3000::~radio_ctrl_core_3000(void){
+radio_ctrl_core_3000::~radio_ctrl_core_3000(void)
+{
     /* NOP */
 }
 
-class radio_ctrl_core_3000_impl: public radio_ctrl_core_3000
+class radio_ctrl_core_3000_impl : public radio_ctrl_core_3000
 {
 public:
-
     radio_ctrl_core_3000_impl(const bool big_endian,
-            uhd::transport::zero_copy_if::sptr ctrl_xport,
-            uhd::transport::zero_copy_if::sptr resp_xport,
-            const uint32_t sid, const std::string &name) :
-            _link_type(vrt::if_packet_info_t::LINK_TYPE_CHDR), _packet_type(
-                    vrt::if_packet_info_t::PACKET_TYPE_CONTEXT), _bige(
-                    big_endian), _ctrl_xport(ctrl_xport), _resp_xport(
-                    resp_xport), _sid(sid), _name(name), _seq_out(0), _timeout(
-                    ACK_TIMEOUT), _resp_queue(128/*max response msgs*/), _resp_queue_size(
-                    _resp_xport ? _resp_xport->get_num_recv_frames() : 3)
+        uhd::transport::zero_copy_if::sptr ctrl_xport,
+        uhd::transport::zero_copy_if::sptr resp_xport,
+        const uint32_t sid,
+        const std::string& name)
+        : _link_type(vrt::if_packet_info_t::LINK_TYPE_CHDR)
+        , _packet_type(vrt::if_packet_info_t::PACKET_TYPE_CONTEXT)
+        , _bige(big_endian)
+        , _ctrl_xport(ctrl_xport)
+        , _resp_xport(resp_xport)
+        , _sid(sid)
+        , _name(name)
+        , _seq_out(0)
+        , _timeout(ACK_TIMEOUT)
+        , _resp_queue(128 /*max response msgs*/)
+        , _resp_queue_size(_resp_xport ? _resp_xport->get_num_recv_frames() : 3)
     {
-        if (resp_xport)
-        {
-            while (resp_xport->get_recv_buff(0.0)) {} //flush
+        if (resp_xport) {
+            while (resp_xport->get_recv_buff(0.0)) {
+            } // flush
         }
         this->set_time(uhd::time_spec_t(0.0));
-        this->set_tick_rate(1.0); //something possible but bogus
+        this->set_tick_rate(1.0); // something possible but bogus
     }
 
     ~radio_ctrl_core_3000_impl(void)
     {
-        _timeout = ACK_TIMEOUT; //reset timeout to something small
+        _timeout = ACK_TIMEOUT; // reset timeout to something small
         UHD_SAFE_CALL(
-            this->peek32(0);//dummy peek with the purpose of ack'ing all packets
-            _async_task.reset();//now its ok to release the task
+            this->peek32(0); // dummy peek with the purpose of ack'ing all packets
+            _async_task.reset(); // now its ok to release the task
         )
     }
 
@@ -69,36 +75,37 @@ public:
     void poke32(const wb_addr_type addr, const uint32_t data)
     {
         boost::mutex::scoped_lock lock(_mutex);
-        this->send_pkt(addr/4, data);
+        this->send_pkt(addr / 4, data);
         this->wait_for_ack(false);
     }
 
     uint32_t peek32(const wb_addr_type addr)
     {
         boost::mutex::scoped_lock lock(_mutex);
-        this->send_pkt(SR_READBACK, addr/8);
+        this->send_pkt(SR_READBACK, addr / 8);
         const uint64_t res = this->wait_for_ack(true);
-        const uint32_t lo = uint32_t(res & 0xffffffff);
-        const uint32_t hi = uint32_t(res >> 32);
-        return ((addr/4) & 0x1)? hi : lo;
+        const uint32_t lo  = uint32_t(res & 0xffffffff);
+        const uint32_t hi  = uint32_t(res >> 32);
+        return ((addr / 4) & 0x1) ? hi : lo;
     }
 
     uint64_t peek64(const wb_addr_type addr)
     {
         boost::mutex::scoped_lock lock(_mutex);
-        this->send_pkt(SR_READBACK, addr/8);
+        this->send_pkt(SR_READBACK, addr / 8);
         return this->wait_for_ack(true);
     }
 
     /*******************************************************************
      * Update methods for time
      ******************************************************************/
-    void set_time(const uhd::time_spec_t &time)
+    void set_time(const uhd::time_spec_t& time)
     {
         boost::mutex::scoped_lock lock(_mutex);
-        _time = time;
+        _time     = time;
         _use_time = _time != uhd::time_spec_t(0.0);
-        if (_use_time) _timeout = MASSIVE_TIMEOUT; //permanently sets larger timeout
+        if (_use_time)
+            _timeout = MASSIVE_TIMEOUT; // permanently sets larger timeout
     }
 
     uhd::time_spec_t get_time(void)
@@ -129,76 +136,77 @@ private:
         if (not buff) {
             throw uhd::runtime_error("fifo ctrl timed out getting a send buffer");
         }
-        uint32_t *pkt = buff->cast<uint32_t *>();
+        uint32_t* pkt = buff->cast<uint32_t*>();
 
-        //load packet info
+        // load packet info
         vrt::if_packet_info_t packet_info;
-        packet_info.link_type = _link_type;
-        packet_info.packet_type = _packet_type;
+        packet_info.link_type           = _link_type;
+        packet_info.packet_type         = _packet_type;
         packet_info.num_payload_words32 = 2;
-        packet_info.num_payload_bytes = packet_info.num_payload_words32*sizeof(uint32_t);
+        packet_info.num_payload_bytes =
+            packet_info.num_payload_words32 * sizeof(uint32_t);
         packet_info.packet_count = _seq_out;
-        packet_info.tsf = _time.to_ticks(_tick_rate);
-        packet_info.sob = false;
-        packet_info.eob = false;
-        packet_info.sid = _sid;
-        packet_info.has_sid = true;
-        packet_info.has_cid = false;
-        packet_info.has_tsi = false;
-        packet_info.has_tsf = _use_time;
-        packet_info.has_tlr = false;
-
-        //load header
-        if (_bige) vrt::if_hdr_pack_be(pkt, packet_info);
-        else vrt::if_hdr_pack_le(pkt, packet_info);
-
-        //load payload
-        pkt[packet_info.num_header_words32+0] = (_bige)? uhd::htonx(addr) : uhd::htowx(addr);
-        pkt[packet_info.num_header_words32+1] = (_bige)? uhd::htonx(data) : uhd::htowx(data);
-        //UHD_LOGGER_INFO("radio_ctrl") << boost::format("0x%08x, 0x%08x\n") % addr % data;
-        //send the buffer over the interface
+        packet_info.tsf          = _time.to_ticks(_tick_rate);
+        packet_info.sob          = false;
+        packet_info.eob          = false;
+        packet_info.sid          = _sid;
+        packet_info.has_sid      = true;
+        packet_info.has_cid      = false;
+        packet_info.has_tsi      = false;
+        packet_info.has_tsf      = _use_time;
+        packet_info.has_tlr      = false;
+
+        // load header
+        if (_bige)
+            vrt::if_hdr_pack_be(pkt, packet_info);
+        else
+            vrt::if_hdr_pack_le(pkt, packet_info);
+
+        // load payload
+        pkt[packet_info.num_header_words32 + 0] = (_bige) ? uhd::htonx(addr)
+                                                          : uhd::htowx(addr);
+        pkt[packet_info.num_header_words32 + 1] = (_bige) ? uhd::htonx(data)
+                                                          : uhd::htowx(data);
+        // UHD_LOGGER_INFO("radio_ctrl") << boost::format("0x%08x, 0x%08x\n") % addr %
+        // data; send the buffer over the interface
         _outstanding_seqs.push(_seq_out);
-        buff->commit(sizeof(uint32_t)*(packet_info.num_packet_words32));
+        buff->commit(sizeof(uint32_t) * (packet_info.num_packet_words32));
 
-        _seq_out++;//inc seq for next call
+        _seq_out++; // inc seq for next call
     }
 
     UHD_INLINE uint64_t wait_for_ack(const bool readback)
     {
-        while (readback or (_outstanding_seqs.size() >= _resp_queue_size))
-        {
-            //get seq to ack from outstanding packets list
+        while (readback or (_outstanding_seqs.size() >= _resp_queue_size)) {
+            // get seq to ack from outstanding packets list
             UHD_ASSERT_THROW(not _outstanding_seqs.empty());
             const size_t seq_to_ack = _outstanding_seqs.front();
             _outstanding_seqs.pop();
 
-            //parse the packet
+            // parse the packet
             vrt::if_packet_info_t packet_info;
             resp_buff_type resp_buff;
             memset(&resp_buff, 0x00, sizeof(resp_buff));
-            uint32_t const *pkt = NULL;
+            uint32_t const* pkt = NULL;
             managed_recv_buffer::sptr buff;
 
-            //get buffer from response endpoint - or die in timeout
-            if (_resp_xport)
-            {
+            // get buffer from response endpoint - or die in timeout
+            if (_resp_xport) {
                 buff = _resp_xport->get_recv_buff(_timeout);
-                try
-                {
+                try {
                     UHD_ASSERT_THROW(bool(buff));
                     UHD_ASSERT_THROW(buff->size() > 0);
+                } catch (const std::exception& ex) {
+                    throw uhd::io_error(
+                        str(boost::format("Radio ctrl (%s) no response packet - %s")
+                            % _name % ex.what()));
                 }
-                catch(const std::exception &ex)
-                {
-                    throw uhd::io_error(str(boost::format("Radio ctrl (%s) no response packet - %s") % _name % ex.what()));
-                }
-                pkt = buff->cast<const uint32_t *>();
-                packet_info.num_packet_words32 = buff->size()/sizeof(uint32_t);
+                pkt                            = buff->cast<const uint32_t*>();
+                packet_info.num_packet_words32 = buff->size() / sizeof(uint32_t);
             }
 
-            //get buffer from response endpoint - or die in timeout
-            else
-            {
+            // get buffer from response endpoint - or die in timeout
+            else {
                 /*
                  * Couldn't get message with haste.
                  * Now check both possible queues for messages.
@@ -206,12 +214,12 @@ private:
                  * but could end up in dump_queue.
                  * If we don't get a message --> Die in timeout.
                  */
-                double accum_timeout = 0.0;
+                double accum_timeout       = 0.0;
                 const double short_timeout = 0.005; // == 5ms
-                while(not ((_resp_queue.pop_with_haste(resp_buff))
+                while (
+                    not((_resp_queue.pop_with_haste(resp_buff))
                         || (check_dump_queue(resp_buff))
-                        || (_resp_queue.pop_with_timed_wait(resp_buff, short_timeout))
-                        )){
+                        || (_resp_queue.pop_with_timed_wait(resp_buff, short_timeout)))) {
                     /*
                      * If a message couldn't be received within a given timeout
                      * --> throw AssertionError!
@@ -220,51 +228,53 @@ private:
                     UHD_ASSERT_THROW(accum_timeout < _timeout);
                 }
 
-                pkt = resp_buff.data;
-                packet_info.num_packet_words32 = sizeof(resp_buff)/sizeof(uint32_t);
+                pkt                            = resp_buff.data;
+                packet_info.num_packet_words32 = sizeof(resp_buff) / sizeof(uint32_t);
             }
 
-            //parse the buffer
-            try
-            {
+            // parse the buffer
+            try {
                 packet_info.link_type = _link_type;
-                if (_bige) vrt::if_hdr_unpack_be(pkt, packet_info);
-                else vrt::if_hdr_unpack_le(pkt, packet_info);
-            }
-            catch(const std::exception &ex)
-            {
-                UHD_LOGGER_ERROR("radio_ctrl") << "Radio ctrl bad VITA packet: " << ex.what() ;
-                if (buff){
+                if (_bige)
+                    vrt::if_hdr_unpack_be(pkt, packet_info);
+                else
+                    vrt::if_hdr_unpack_le(pkt, packet_info);
+            } catch (const std::exception& ex) {
+                UHD_LOGGER_ERROR("radio_ctrl")
+                    << "Radio ctrl bad VITA packet: " << ex.what();
+                if (buff) {
                     UHD_VAR(buff->size());
+                } else {
+                    UHD_LOGGER_INFO("radio_ctrl") << "buff is NULL";
                 }
-                else{
-                    UHD_LOGGER_INFO("radio_ctrl") << "buff is NULL" ;
-                }
-                UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[0] << std::dec ;
-                UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[1] << std::dec ;
-                UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[2] << std::dec ;
-                UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[3] << std::dec ;
+                UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[0] << std::dec;
+                UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[1] << std::dec;
+                UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[2] << std::dec;
+                UHD_LOGGER_INFO("radio_ctrl") << std::hex << pkt[3] << std::dec;
             }
 
-            //check the buffer
-            try
-            {
+            // check the buffer
+            try {
                 UHD_ASSERT_THROW(packet_info.has_sid);
-                UHD_ASSERT_THROW(packet_info.sid == uint32_t((_sid >> 16) | (_sid << 16)));
+                UHD_ASSERT_THROW(
+                    packet_info.sid == uint32_t((_sid >> 16) | (_sid << 16)));
                 UHD_ASSERT_THROW(packet_info.packet_count == (seq_to_ack & 0xfff));
                 UHD_ASSERT_THROW(packet_info.num_payload_words32 == 2);
                 UHD_ASSERT_THROW(packet_info.packet_type == _packet_type);
-            }
-            catch(const std::exception &ex)
-            {
-                throw uhd::io_error(str(boost::format("Radio ctrl (%s) packet parse error - %s") % _name % ex.what()));
+            } catch (const std::exception& ex) {
+                throw uhd::io_error(
+                    str(boost::format("Radio ctrl (%s) packet parse error - %s") % _name
+                        % ex.what()));
             }
 
-            //return the readback value
-            if (readback and _outstanding_seqs.empty())
-            {
-                const uint64_t hi = (_bige)? uhd::ntohx(pkt[packet_info.num_header_words32+0]) : uhd::wtohx(pkt[packet_info.num_header_words32+0]);
-                const uint64_t lo = (_bige)? uhd::ntohx(pkt[packet_info.num_header_words32+1]) : uhd::wtohx(pkt[packet_info.num_header_words32+1]);
+            // return the readback value
+            if (readback and _outstanding_seqs.empty()) {
+                const uint64_t hi =
+                    (_bige) ? uhd::ntohx(pkt[packet_info.num_header_words32 + 0])
+                            : uhd::wtohx(pkt[packet_info.num_header_words32 + 0]);
+                const uint64_t lo =
+                    (_bige) ? uhd::ntohx(pkt[packet_info.num_header_words32 + 1])
+                            : uhd::wtohx(pkt[packet_info.num_header_words32 + 1]);
                 return ((hi << 32) | lo);
             }
         }
@@ -273,30 +283,31 @@ private:
     }
 
     /*
-     * If ctrl_core waits for a message that didn't arrive it can search for it in the dump queue.
-     * This actually happens during shutdown.
-     * handle_async_task can't access radio_ctrl_cores queue anymore thus it returns the corresponding message.
-     * msg_task class implements a dump_queue to store such messages.
-     * With check_dump_queue we can check if a message we are waiting for got stranded there.
-     * If a message got stuck we get it here and push it onto our own message_queue.
+     * If ctrl_core waits for a message that didn't arrive it can search for it in the
+     * dump queue. This actually happens during shutdown. handle_async_task can't access
+     * radio_ctrl_cores queue anymore thus it returns the corresponding message. msg_task
+     * class implements a dump_queue to store such messages. With check_dump_queue we can
+     * check if a message we are waiting for got stranded there. If a message got stuck we
+     * get it here and push it onto our own message_queue.
      */
-    bool check_dump_queue(resp_buff_type& b) {
-        const size_t min_buff_size = 8; // Same value as in b200_io_impl->handle_async_task
-        uint32_t recv_sid = (((_sid)<<16)|((_sid)>>16));
+    bool check_dump_queue(resp_buff_type& b)
+    {
+        const size_t min_buff_size =
+            8; // Same value as in b200_io_impl->handle_async_task
+        uint32_t recv_sid = (((_sid) << 16) | ((_sid) >> 16));
         uhd::msg_task::msg_payload_t msg;
-        do{
+        do {
             msg = _async_task->get_msg_from_dump_queue(recv_sid);
-        }
-        while(msg.size() < min_buff_size && msg.size() != 0);
+        } while (msg.size() < min_buff_size && msg.size() != 0);
 
-        if(msg.size() >= min_buff_size) {
+        if (msg.size() >= min_buff_size) {
             memcpy(b.data, &msg.front(), std::min(msg.size(), sizeof(b.data)));
             return true;
         }
         return false;
     }
 
-    void push_response(const uint32_t *buff)
+    void push_response(const uint32_t* buff)
     {
         resp_buff_type resp_buff;
         std::memcpy(resp_buff.data, buff, sizeof(resp_buff));
@@ -328,10 +339,11 @@ private:
 };
 
 radio_ctrl_core_3000::sptr radio_ctrl_core_3000::make(const bool big_endian,
-        zero_copy_if::sptr ctrl_xport, zero_copy_if::sptr resp_xport,
-        const uint32_t sid, const std::string &name)
+    zero_copy_if::sptr ctrl_xport,
+    zero_copy_if::sptr resp_xport,
+    const uint32_t sid,
+    const std::string& name)
 {
     return sptr(
-            new radio_ctrl_core_3000_impl(big_endian, ctrl_xport, resp_xport,
-                    sid, name));
+        new radio_ctrl_core_3000_impl(big_endian, ctrl_xport, resp_xport, sid, name));
 }
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp
index 700a3c207..89b44290f 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp
@@ -5,73 +5,78 @@
 // SPDX-License-Identifier: GPL-3.0-or-later
 //
 
-#include <uhd/types/dict.hpp>
 #include <uhd/exception.hpp>
-#include <uhd/utils/math.hpp>
+#include <uhd/types/dict.hpp>
 #include <uhd/utils/log.hpp>
+#include <uhd/utils/math.hpp>
 #include <uhd/utils/safe_call.hpp>
-#include <uhdlib/usrp/cores/rx_dsp_core_200.hpp>
 #include <uhdlib/usrp/cores/dsp_core_utils.hpp>
+#include <uhdlib/usrp/cores/rx_dsp_core_200.hpp>
 #include <boost/assign/list_of.hpp>
 #include <boost/math/special_functions/round.hpp>
 #include <boost/numeric/conversion/bounds.hpp>
 #include <algorithm>
-#include <cmath>
 #include <chrono>
+#include <cmath>
 #include <thread>
 #include <tuple>
 
-#define REG_DSP_RX_FREQ       _dsp_base + 0
-#define REG_DSP_RX_SCALE_IQ   _dsp_base + 4
-#define REG_DSP_RX_DECIM      _dsp_base + 8
-#define REG_DSP_RX_MUX        _dsp_base + 12
+#define REG_DSP_RX_FREQ _dsp_base + 0
+#define REG_DSP_RX_SCALE_IQ _dsp_base + 4
+#define REG_DSP_RX_DECIM _dsp_base + 8
+#define REG_DSP_RX_MUX _dsp_base + 12
 
-#define FLAG_DSP_RX_MUX_SWAP_IQ   (1 << 0)
+#define FLAG_DSP_RX_MUX_SWAP_IQ (1 << 0)
 #define FLAG_DSP_RX_MUX_REAL_MODE (1 << 1)
 
-#define REG_RX_CTRL_STREAM_CMD     _ctrl_base + 0
-#define REG_RX_CTRL_TIME_HI        _ctrl_base + 4
-#define REG_RX_CTRL_TIME_LO        _ctrl_base + 8
-#define REG_RX_CTRL_FORMAT         _ctrl_base + 12
-#define REG_RX_CTRL_VRT_HDR        _ctrl_base + 16
-#define REG_RX_CTRL_VRT_SID        _ctrl_base + 20
-#define REG_RX_CTRL_VRT_TLR        _ctrl_base + 24
-#define REG_RX_CTRL_NSAMPS_PP      _ctrl_base + 28
-#define REG_RX_CTRL_NCHANNELS      _ctrl_base + 32
-
-template <class T> T ceil_log2(T num){
-    return std::ceil(std::log(num)/std::log(T(2)));
+#define REG_RX_CTRL_STREAM_CMD _ctrl_base + 0
+#define REG_RX_CTRL_TIME_HI _ctrl_base + 4
+#define REG_RX_CTRL_TIME_LO _ctrl_base + 8
+#define REG_RX_CTRL_FORMAT _ctrl_base + 12
+#define REG_RX_CTRL_VRT_HDR _ctrl_base + 16
+#define REG_RX_CTRL_VRT_SID _ctrl_base + 20
+#define REG_RX_CTRL_VRT_TLR _ctrl_base + 24
+#define REG_RX_CTRL_NSAMPS_PP _ctrl_base + 28
+#define REG_RX_CTRL_NCHANNELS _ctrl_base + 32
+
+template <class T>
+T ceil_log2(T num)
+{
+    return std::ceil(std::log(num) / std::log(T(2)));
 }
 
 using namespace uhd;
 
-rx_dsp_core_200::~rx_dsp_core_200(void){
+rx_dsp_core_200::~rx_dsp_core_200(void)
+{
     /* NOP */
 }
 
-class rx_dsp_core_200_impl : public rx_dsp_core_200{
+class rx_dsp_core_200_impl : public rx_dsp_core_200
+{
 public:
-    rx_dsp_core_200_impl(
-        wb_iface::sptr iface,
-        const size_t dsp_base, const size_t ctrl_base,
-        const uint32_t sid, const bool lingering_packet
-    ):
-        _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base),  _sid(sid)
+    rx_dsp_core_200_impl(wb_iface::sptr iface,
+        const size_t dsp_base,
+        const size_t ctrl_base,
+        const uint32_t sid,
+        const bool lingering_packet)
+        : _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base), _sid(sid)
     {
         // previously uninitialized - assuming zero for all
         _tick_rate = _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0;
 
-        //init to something so update method has reasonable defaults
+        // init to something so update method has reasonable defaults
         _scaling_adjustment = 1.0;
-        _dsp_extra_scaling = 1.0;
+        _dsp_extra_scaling  = 1.0;
 
-        //This is a hack/fix for the lingering packet problem.
-        //The caller should also flush the recv transports
-        if (lingering_packet){
+        // This is a hack/fix for the lingering packet problem.
+        // The caller should also flush the recv transports
+        if (lingering_packet) {
             stream_cmd_t stream_cmd(stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE);
             stream_cmd.num_samps = 1;
             issue_stream_command(stream_cmd);
-            std::this_thread::sleep_for(std::chrono::milliseconds(10)); //lets lingering pkt propagate
+            std::this_thread::sleep_for(
+                std::chrono::milliseconds(10)); // lets lingering pkt propagate
         }
 
         this->clear();
@@ -79,143 +84,164 @@ public:
 
     ~rx_dsp_core_200_impl(void)
     {
-        UHD_SAFE_CALL
-        (
-            //shutdown any possible streaming
-            this->clear();
-        )
+        UHD_SAFE_CALL(
+            // shutdown any possible streaming
+            this->clear();)
     }
 
-    void clear(void){
-        _iface->poke32(REG_RX_CTRL_NCHANNELS, 0); //also reset
-        _iface->poke32(REG_RX_CTRL_VRT_HDR, 0
-            | (0x1 << 28) //if data with stream id
-            | (0x1 << 26) //has trailer
-            | (0x1 << 20) //fractional time sample count
+    void clear(void)
+    {
+        _iface->poke32(REG_RX_CTRL_NCHANNELS, 0); // also reset
+        _iface->poke32(REG_RX_CTRL_VRT_HDR,
+            0 | (0x1 << 28) // if data with stream id
+                | (0x1 << 26) // has trailer
+                | (0x1 << 20) // fractional time sample count
         );
         _iface->poke32(REG_RX_CTRL_VRT_SID, _sid);
         _iface->poke32(REG_RX_CTRL_VRT_TLR, 0);
     }
 
-    void set_nsamps_per_packet(const size_t nsamps){
+    void set_nsamps_per_packet(const size_t nsamps)
+    {
         _iface->poke32(REG_RX_CTRL_NSAMPS_PP, nsamps);
     }
 
-    void issue_stream_command(const stream_cmd_t &stream_cmd){
+    void issue_stream_command(const stream_cmd_t& stream_cmd)
+    {
         UHD_ASSERT_THROW(stream_cmd.num_samps <= 0x0fffffff);
-        _continuous_streaming = stream_cmd.stream_mode == stream_cmd_t::STREAM_MODE_START_CONTINUOUS;
+        _continuous_streaming = stream_cmd.stream_mode
+                                == stream_cmd_t::STREAM_MODE_START_CONTINUOUS;
 
-        //setup the mode to instruction flags
+        // setup the mode to instruction flags
         typedef std::tuple<bool, bool, bool, bool> inst_t;
-        static const uhd::dict<stream_cmd_t::stream_mode_t, inst_t> mode_to_inst = boost::assign::map_list_of
-                                                                //reload, chain, samps, stop
-            (stream_cmd_t::STREAM_MODE_START_CONTINUOUS,   inst_t(true,  true,  false, false))
-            (stream_cmd_t::STREAM_MODE_STOP_CONTINUOUS,    inst_t(false, false, false, true))
-            (stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE, inst_t(false, false, true,  false))
-            (stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_MORE, inst_t(false, true,  true,  false))
-        ;
-
-        //setup the instruction flag values
+        static const uhd::dict<stream_cmd_t::stream_mode_t, inst_t> mode_to_inst =
+            boost::assign::map_list_of
+            // reload, chain, samps, stop
+            (stream_cmd_t::STREAM_MODE_START_CONTINUOUS,
+                inst_t(true, true, false, false))(
+                stream_cmd_t::STREAM_MODE_STOP_CONTINUOUS,
+                inst_t(false, false, false, true))(
+                stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE,
+                inst_t(false, false, true, false))(
+                stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_MORE,
+                inst_t(false, true, true, false));
+
+        // setup the instruction flag values
         bool inst_reload, inst_chain, inst_samps, inst_stop;
-        std::tie(inst_reload, inst_chain, inst_samps, inst_stop) = mode_to_inst[stream_cmd.stream_mode];
+        std::tie(inst_reload, inst_chain, inst_samps, inst_stop) =
+            mode_to_inst[stream_cmd.stream_mode];
 
-        //calculate the word from flags and length
+        // calculate the word from flags and length
         uint32_t cmd_word = 0;
-        cmd_word |= uint32_t((stream_cmd.stream_now)? 1 : 0) << 31;
-        cmd_word |= uint32_t((inst_chain)?            1 : 0) << 30;
-        cmd_word |= uint32_t((inst_reload)?           1 : 0) << 29;
-        cmd_word |= uint32_t((inst_stop)?             1 : 0) << 28;
-        cmd_word |= (inst_samps)? stream_cmd.num_samps : ((inst_stop)? 0 : 1);
+        cmd_word |= uint32_t((stream_cmd.stream_now) ? 1 : 0) << 31;
+        cmd_word |= uint32_t((inst_chain) ? 1 : 0) << 30;
+        cmd_word |= uint32_t((inst_reload) ? 1 : 0) << 29;
+        cmd_word |= uint32_t((inst_stop) ? 1 : 0) << 28;
+        cmd_word |= (inst_samps) ? stream_cmd.num_samps : ((inst_stop) ? 0 : 1);
 
-        //issue the stream command
+        // issue the stream command
         _iface->poke32(REG_RX_CTRL_STREAM_CMD, cmd_word);
-        const uint64_t ticks = (stream_cmd.stream_now)? 0 : stream_cmd.time_spec.to_ticks(_tick_rate);
+        const uint64_t ticks =
+            (stream_cmd.stream_now) ? 0 : stream_cmd.time_spec.to_ticks(_tick_rate);
         _iface->poke32(REG_RX_CTRL_TIME_HI, uint32_t(ticks >> 32));
-        _iface->poke32(REG_RX_CTRL_TIME_LO, uint32_t(ticks >> 0)); //latches the command
+        _iface->poke32(REG_RX_CTRL_TIME_LO, uint32_t(ticks >> 0)); // latches the command
     }
 
-    void set_mux(const std::string &mode, const bool fe_swapped){
-        static const uhd::dict<std::string, uint32_t> mode_to_mux = boost::assign::map_list_of
-            ("IQ", 0)
-            ("QI", FLAG_DSP_RX_MUX_SWAP_IQ)
-            ("I", FLAG_DSP_RX_MUX_REAL_MODE)
-            ("Q", FLAG_DSP_RX_MUX_SWAP_IQ | FLAG_DSP_RX_MUX_REAL_MODE)
-        ;
-        _iface->poke32(REG_DSP_RX_MUX, mode_to_mux[mode] ^ (fe_swapped? FLAG_DSP_RX_MUX_SWAP_IQ : 0));
+    void set_mux(const std::string& mode, const bool fe_swapped)
+    {
+        static const uhd::dict<std::string, uint32_t> mode_to_mux =
+            boost::assign::map_list_of("IQ", 0)("QI", FLAG_DSP_RX_MUX_SWAP_IQ)(
+                "I", FLAG_DSP_RX_MUX_REAL_MODE)(
+                "Q", FLAG_DSP_RX_MUX_SWAP_IQ | FLAG_DSP_RX_MUX_REAL_MODE);
+        _iface->poke32(REG_DSP_RX_MUX,
+            mode_to_mux[mode] ^ (fe_swapped ? FLAG_DSP_RX_MUX_SWAP_IQ : 0));
     }
 
-    void set_tick_rate(const double rate){
+    void set_tick_rate(const double rate)
+    {
         _tick_rate = rate;
     }
 
-    void set_link_rate(const double rate){
+    void set_link_rate(const double rate)
+    {
         //_link_rate = rate/sizeof(uint32_t); //in samps/s
-        _link_rate = rate/sizeof(uint16_t); //in samps/s (allows for 8sc)
+        _link_rate = rate / sizeof(uint16_t); // in samps/s (allows for 8sc)
     }
 
-    uhd::meta_range_t get_host_rates(void){
+    uhd::meta_range_t get_host_rates(void)
+    {
         meta_range_t range;
-        for (int rate = 512; rate > 256; rate -= 4){
-            range.push_back(range_t(_tick_rate/rate));
+        for (int rate = 512; rate > 256; rate -= 4) {
+            range.push_back(range_t(_tick_rate / rate));
         }
-        for (int rate = 256; rate > 128; rate -= 2){
-            range.push_back(range_t(_tick_rate/rate));
+        for (int rate = 256; rate > 128; rate -= 2) {
+            range.push_back(range_t(_tick_rate / rate));
         }
-        for (int rate = 128; rate >= int(std::ceil(_tick_rate/_link_rate)); rate -= 1){
-            range.push_back(range_t(_tick_rate/rate));
+        for (int rate = 128; rate >= int(std::ceil(_tick_rate / _link_rate)); rate -= 1) {
+            range.push_back(range_t(_tick_rate / rate));
         }
         return range;
     }
 
-    double set_host_rate(const double rate){
-        const size_t decim_rate = boost::math::iround(_tick_rate/this->get_host_rates().clip(rate, true));
+    double set_host_rate(const double rate)
+    {
+        const size_t decim_rate =
+            boost::math::iround(_tick_rate / this->get_host_rates().clip(rate, true));
         size_t decim = decim_rate;
 
-        //determine which half-band filters are activated
+        // determine which half-band filters are activated
         int hb0 = 0, hb1 = 0;
-        // hb0 can only be enabled if the rate will be decimated by at least 2 between the CIC and hb1
-        if (decim >= 4 && decim % 2 == 0){
+        // hb0 can only be enabled if the rate will be decimated by at least 2 between the
+        // CIC and hb1
+        if (decim >= 4 && decim % 2 == 0) {
             hb0 = 1;
             decim /= 2;
         }
-        if (decim % 2 == 0){
+        if (decim % 2 == 0) {
             hb1 = 1;
             decim /= 2;
         }
 
         _iface->poke32(REG_DSP_RX_DECIM, (hb1 << 9) | (hb0 << 8) | (decim & 0xff));
 
-        if (decim > 1 and hb0 == 0 and hb1 == 0)
-        {
-            UHD_LOGGER_WARNING("CORES") << boost::format(
-                "The requested decimation is odd; the user should expect CIC rolloff.\n"
-                "Select an even decimation to ensure that a halfband filter is enabled.\n"
-                "decimation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n"
-            ) % decim_rate % (_tick_rate/1e6) % (rate/1e6);
+        if (decim > 1 and hb0 == 0 and hb1 == 0) {
+            UHD_LOGGER_WARNING("CORES")
+                << boost::format(
+                       "The requested decimation is odd; the user should expect CIC "
+                       "rolloff.\n"
+                       "Select an even decimation to ensure that a halfband filter is "
+                       "enabled.\n"
+                       "decimation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n")
+                       % decim_rate % (_tick_rate / 1e6) % (rate / 1e6);
         }
 
         // Calculate CIC decimation (i.e., without halfband decimators)
         // Calculate closest multiplier constant to reverse gain absent scale multipliers
         const double rate_pow = std::pow(double(decim & 0xff), 4);
-        _scaling_adjustment = std::pow(2, ceil_log2(rate_pow))/(1.65*rate_pow);
+        _scaling_adjustment   = std::pow(2, ceil_log2(rate_pow)) / (1.65 * rate_pow);
         this->update_scalar();
 
-        return _tick_rate/decim_rate;
+        return _tick_rate / decim_rate;
     }
 
-    void update_scalar(void){
+    void update_scalar(void)
+    {
         const double factor = 1.0 + std::max(ceil_log2(_scaling_adjustment), 0.0);
-        const double target_scalar = (1 << 17)*_scaling_adjustment/_dsp_extra_scaling/factor;
+        const double target_scalar =
+            (1 << 17) * _scaling_adjustment / _dsp_extra_scaling / factor;
         const int32_t actual_scalar = boost::math::iround(target_scalar);
-        _fxpt_scalar_correction = target_scalar/actual_scalar*factor; //should be small
+        _fxpt_scalar_correction =
+            target_scalar / actual_scalar * factor; // should be small
         _iface->poke32(REG_DSP_RX_SCALE_IQ, actual_scalar);
     }
 
-    double get_scaling_adjustment(void){
-        return _fxpt_scalar_correction*_host_extra_scaling/32767.;
+    double get_scaling_adjustment(void)
+    {
+        return _fxpt_scalar_correction * _host_extra_scaling / 32767.;
     }
 
-    double set_freq(const double requested_freq){
+    double set_freq(const double requested_freq)
+    {
         double actual_freq;
         int32_t freq_word;
         get_freq_and_freq_word(requested_freq, _tick_rate, actual_freq, freq_word);
@@ -223,31 +249,37 @@ public:
         return actual_freq;
     }
 
-    uhd::meta_range_t get_freq_range(void){
-        return uhd::meta_range_t(-_tick_rate/2, +_tick_rate/2, _tick_rate/std::pow(2.0, 32));
+    uhd::meta_range_t get_freq_range(void)
+    {
+        return uhd::meta_range_t(
+            -_tick_rate / 2, +_tick_rate / 2, _tick_rate / std::pow(2.0, 32));
     }
 
-    void handle_overflow(void){
-        if (_continuous_streaming) issue_stream_command(stream_cmd_t::STREAM_MODE_START_CONTINUOUS);
+    void handle_overflow(void)
+    {
+        if (_continuous_streaming)
+            issue_stream_command(stream_cmd_t::STREAM_MODE_START_CONTINUOUS);
     }
 
-    void setup(const uhd::stream_args_t &stream_args){
-        if (not stream_args.args.has_key("noclear")) this->clear();
+    void setup(const uhd::stream_args_t& stream_args)
+    {
+        if (not stream_args.args.has_key("noclear"))
+            this->clear();
 
         unsigned format_word = 0;
-        if (stream_args.otw_format == "sc16"){
-            format_word = 0;
-            _dsp_extra_scaling = 1.0;
+        if (stream_args.otw_format == "sc16") {
+            format_word         = 0;
+            _dsp_extra_scaling  = 1.0;
             _host_extra_scaling = 1.0;
-        }
-        else if (stream_args.otw_format == "sc8"){
-            format_word = (1 << 0);
-            double peak = stream_args.args.cast<double>("peak", 1.0);
-            peak = std::max(peak, 1.0/256);
-            _host_extra_scaling = peak*256;
-            _dsp_extra_scaling = peak*256;
-        }
-        else throw uhd::value_error("USRP RX cannot handle requested wire format: " + stream_args.otw_format);
+        } else if (stream_args.otw_format == "sc8") {
+            format_word         = (1 << 0);
+            double peak         = stream_args.args.cast<double>("peak", 1.0);
+            peak                = std::max(peak, 1.0 / 256);
+            _host_extra_scaling = peak * 256;
+            _dsp_extra_scaling  = peak * 256;
+        } else
+            throw uhd::value_error(
+                "USRP RX cannot handle requested wire format: " + stream_args.otw_format);
 
         _host_extra_scaling *= stream_args.args.cast<double>("fullscale", 1.0);
 
@@ -262,10 +294,17 @@ private:
     const size_t _dsp_base, _ctrl_base;
     double _tick_rate, _link_rate;
     bool _continuous_streaming;
-    double _scaling_adjustment, _dsp_extra_scaling, _host_extra_scaling, _fxpt_scalar_correction;
+    double _scaling_adjustment, _dsp_extra_scaling, _host_extra_scaling,
+        _fxpt_scalar_correction;
     const uint32_t _sid;
 };
 
-rx_dsp_core_200::sptr rx_dsp_core_200::make(wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, const uint32_t sid, const bool lingering_packet){
-    return sptr(new rx_dsp_core_200_impl(iface, dsp_base, ctrl_base, sid, lingering_packet));
+rx_dsp_core_200::sptr rx_dsp_core_200::make(wb_iface::sptr iface,
+    const size_t dsp_base,
+    const size_t ctrl_base,
+    const uint32_t sid,
+    const bool lingering_packet)
+{
+    return sptr(
+        new rx_dsp_core_200_impl(iface, dsp_base, ctrl_base, sid, lingering_packet));
 }
diff --git a/host/lib/usrp/cores/rx_dsp_core_3000.cpp b/host/lib/usrp/cores/rx_dsp_core_3000.cpp
index d9ad108aa..3724ca827 100644
--- a/host/lib/usrp/cores/rx_dsp_core_3000.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_3000.cpp
@@ -300,10 +300,12 @@ public:
             .set_publisher(std::bind(&rx_dsp_core_3000::get_host_rates, this));
         subtree->create<double>("rate/value")
             .set(DEFAULT_RATE)
-            .set_coercer(std::bind(&rx_dsp_core_3000::set_host_rate, this, std::placeholders::_1));
+            .set_coercer(
+                std::bind(&rx_dsp_core_3000::set_host_rate, this, std::placeholders::_1));
         subtree->create<double>("freq/value")
             .set(DEFAULT_CORDIC_FREQ)
-            .set_coercer(std::bind(&rx_dsp_core_3000::set_freq, this, std::placeholders::_1))
+            .set_coercer(
+                std::bind(&rx_dsp_core_3000::set_freq, this, std::placeholders::_1))
             .set_publisher([this]() { return this->get_freq(); });
         subtree->create<meta_range_t>("freq/range")
             .set_publisher(std::bind(&rx_dsp_core_3000::get_freq_range, this));
diff --git a/host/lib/usrp/cores/rx_frontend_core_200.cpp b/host/lib/usrp/cores/rx_frontend_core_200.cpp
index f30da9466..b16de0d9e 100644
--- a/host/lib/usrp/cores/rx_frontend_core_200.cpp
+++ b/host/lib/usrp/cores/rx_frontend_core_200.cpp
@@ -12,65 +12,75 @@
 
 using namespace uhd;
 
-#define REG_RX_FE_SWAP_IQ             _base + 0 //lower bit
-#define REG_RX_FE_MAG_CORRECTION      _base + 4 //18 bits
-#define REG_RX_FE_PHASE_CORRECTION    _base + 8 //18 bits
-#define REG_RX_FE_OFFSET_I            _base + 12 //18 bits
-#define REG_RX_FE_OFFSET_Q            _base + 16 //18 bits
+#define REG_RX_FE_SWAP_IQ _base + 0 // lower bit
+#define REG_RX_FE_MAG_CORRECTION _base + 4 // 18 bits
+#define REG_RX_FE_PHASE_CORRECTION _base + 8 // 18 bits
+#define REG_RX_FE_OFFSET_I _base + 12 // 18 bits
+#define REG_RX_FE_OFFSET_Q _base + 16 // 18 bits
 
 #define OFFSET_FIXED (1ul << 31)
-#define OFFSET_SET   (1ul << 30)
+#define OFFSET_SET (1ul << 30)
 #define FLAG_MASK (OFFSET_FIXED | OFFSET_SET)
 
 namespace {
-  static const double DC_OFFSET_MIN = -1.0;
-  static const double DC_OFFSET_MAX = 1.0;
-}
+static const double DC_OFFSET_MIN = -1.0;
+static const double DC_OFFSET_MAX = 1.0;
+} // namespace
 
-static uint32_t fs_to_bits(const double num, const size_t bits){
-    return int32_t(boost::math::round(num * (1 << (bits-1))));
+static uint32_t fs_to_bits(const double num, const size_t bits)
+{
+    return int32_t(boost::math::round(num * (1 << (bits - 1))));
 }
 
-rx_frontend_core_200::~rx_frontend_core_200(void){
+rx_frontend_core_200::~rx_frontend_core_200(void)
+{
     /* NOP */
 }
 
-const std::complex<double> rx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE = std::complex<double>(0.0, 0.0);
+const std::complex<double> rx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE =
+    std::complex<double>(0.0, 0.0);
 const bool rx_frontend_core_200::DEFAULT_DC_OFFSET_ENABLE = true;
-const std::complex<double> rx_frontend_core_200::DEFAULT_IQ_BALANCE_VALUE = std::complex<double>(0.0, 0.0);
+const std::complex<double> rx_frontend_core_200::DEFAULT_IQ_BALANCE_VALUE =
+    std::complex<double>(0.0, 0.0);
 
-class rx_frontend_core_200_impl : public rx_frontend_core_200{
+class rx_frontend_core_200_impl : public rx_frontend_core_200
+{
 public:
-    rx_frontend_core_200_impl(wb_iface::sptr iface, const size_t base):
-        _i_dc_off(0), _q_dc_off(0), _iface(iface), _base(base)
+    rx_frontend_core_200_impl(wb_iface::sptr iface, const size_t base)
+        : _i_dc_off(0), _q_dc_off(0), _iface(iface), _base(base)
     {
-        //NOP
+        // NOP
     }
 
-    void set_mux(const bool swap){
-        _iface->poke32(REG_RX_FE_SWAP_IQ, swap? 1 : 0);
+    void set_mux(const bool swap)
+    {
+        _iface->poke32(REG_RX_FE_SWAP_IQ, swap ? 1 : 0);
     }
 
-    void set_dc_offset_auto(const bool enb){
-        this->set_dc_offset(enb? 0 : OFFSET_FIXED);
+    void set_dc_offset_auto(const bool enb)
+    {
+        this->set_dc_offset(enb ? 0 : OFFSET_FIXED);
     }
 
-    std::complex<double> set_dc_offset(const std::complex<double> &off){
+    std::complex<double> set_dc_offset(const std::complex<double>& off)
+    {
         static const double scaler = double(1ul << 29);
-        _i_dc_off = boost::math::iround(off.real()*scaler);
-        _q_dc_off = boost::math::iround(off.imag()*scaler);
+        _i_dc_off                  = boost::math::iround(off.real() * scaler);
+        _q_dc_off                  = boost::math::iround(off.imag() * scaler);
 
         this->set_dc_offset(OFFSET_SET | OFFSET_FIXED);
 
-        return std::complex<double>(_i_dc_off/scaler, _q_dc_off/scaler);
+        return std::complex<double>(_i_dc_off / scaler, _q_dc_off / scaler);
     }
 
-    void set_dc_offset(const uint32_t flags){
+    void set_dc_offset(const uint32_t flags)
+    {
         _iface->poke32(REG_RX_FE_OFFSET_I, flags | (_i_dc_off & ~FLAG_MASK));
         _iface->poke32(REG_RX_FE_OFFSET_Q, flags | (_q_dc_off & ~FLAG_MASK));
     }
 
-    void set_iq_balance(const std::complex<double> &cor){
+    void set_iq_balance(const std::complex<double>& cor)
+    {
         _iface->poke32(REG_RX_FE_MAG_CORRECTION, fs_to_bits(cor.real(), 18));
         _iface->poke32(REG_RX_FE_PHASE_CORRECTION, fs_to_bits(cor.imag(), 18));
     }
@@ -78,20 +88,19 @@ public:
     void populate_subtree(uhd::property_tree::sptr subtree)
     {
         subtree->create<uhd::meta_range_t>("dc_offset/range")
-            .set(meta_range_t(DC_OFFSET_MIN, DC_OFFSET_MAX))
-        ;
-        subtree->create<std::complex<double> >("dc_offset/value")
+            .set(meta_range_t(DC_OFFSET_MIN, DC_OFFSET_MAX));
+        subtree->create<std::complex<double>>("dc_offset/value")
             .set(DEFAULT_DC_OFFSET_VALUE)
-            .set_coercer(std::bind(&rx_frontend_core_200::set_dc_offset, this, std::placeholders::_1))
-        ;
+            .set_coercer(std::bind(
+                &rx_frontend_core_200::set_dc_offset, this, std::placeholders::_1));
         subtree->create<bool>("dc_offset/enable")
             .set(DEFAULT_DC_OFFSET_ENABLE)
-            .add_coerced_subscriber(std::bind(&rx_frontend_core_200::set_dc_offset_auto, this, std::placeholders::_1))
-        ;
-        subtree->create<std::complex<double> >("iq_balance/value")
+            .add_coerced_subscriber(std::bind(
+                &rx_frontend_core_200::set_dc_offset_auto, this, std::placeholders::_1));
+        subtree->create<std::complex<double>>("iq_balance/value")
             .set(DEFAULT_IQ_BALANCE_VALUE)
-            .add_coerced_subscriber(std::bind(&rx_frontend_core_200::set_iq_balance, this, std::placeholders::_1))
-        ;
+            .add_coerced_subscriber(std::bind(
+                &rx_frontend_core_200::set_iq_balance, this, std::placeholders::_1));
     }
 
 private:
@@ -100,6 +109,8 @@ private:
     const size_t _base;
 };
 
-rx_frontend_core_200::sptr rx_frontend_core_200::make(wb_iface::sptr iface, const size_t base){
+rx_frontend_core_200::sptr rx_frontend_core_200::make(
+    wb_iface::sptr iface, const size_t base)
+{
     return sptr(new rx_frontend_core_200_impl(iface, base));
 }
diff --git a/host/lib/usrp/cores/rx_frontend_core_3000.cpp b/host/lib/usrp/cores/rx_frontend_core_3000.cpp
index aa83b83c8..788e222ed 100644
--- a/host/lib/usrp/cores/rx_frontend_core_3000.cpp
+++ b/host/lib/usrp/cores/rx_frontend_core_3000.cpp
@@ -177,15 +177,16 @@ public:
             .set(meta_range_t(DC_OFFSET_MIN, DC_OFFSET_MAX));
         subtree->create<std::complex<double>>("dc_offset/value")
             .set(DEFAULT_DC_OFFSET_VALUE)
-            .set_coercer(std::bind(&rx_frontend_core_3000::set_dc_offset, this, std::placeholders::_1));
+            .set_coercer(std::bind(
+                &rx_frontend_core_3000::set_dc_offset, this, std::placeholders::_1));
         subtree->create<bool>("dc_offset/enable")
             .set(DEFAULT_DC_OFFSET_ENABLE)
-            .add_coerced_subscriber(
-                std::bind(&rx_frontend_core_3000::set_dc_offset_auto, this, std::placeholders::_1));
+            .add_coerced_subscriber(std::bind(
+                &rx_frontend_core_3000::set_dc_offset_auto, this, std::placeholders::_1));
         subtree->create<std::complex<double>>("iq_balance/value")
             .set(DEFAULT_IQ_BALANCE_VALUE)
-            .add_coerced_subscriber(
-                std::bind(&rx_frontend_core_3000::set_iq_balance, this, std::placeholders::_1));
+            .add_coerced_subscriber(std::bind(
+                &rx_frontend_core_3000::set_iq_balance, this, std::placeholders::_1));
     }
 
     double get_output_rate()
diff --git a/host/lib/usrp/cores/rx_vita_core_3000.cpp b/host/lib/usrp/cores/rx_vita_core_3000.cpp
index 166e0d83f..8a20e637b 100644
--- a/host/lib/usrp/cores/rx_vita_core_3000.cpp
+++ b/host/lib/usrp/cores/rx_vita_core_3000.cpp
@@ -10,48 +10,40 @@
 #include <uhdlib/usrp/cores/rx_vita_core_3000.hpp>
 #include <boost/assign/list_of.hpp>
 #include <boost/date_time.hpp>
-#include <thread>
 #include <chrono>
+#include <thread>
 #include <tuple>
 
-#define REG_FRAMER_MAXLEN    _base + 4*4 + 0
-#define REG_FRAMER_SID       _base + 4*4 + 4
+#define REG_FRAMER_MAXLEN _base + 4 * 4 + 0
+#define REG_FRAMER_SID _base + 4 * 4 + 4
 
-#define REG_CTRL_CMD           _base + 0
-#define REG_CTRL_TIME_HI       _base + 4
-#define REG_CTRL_TIME_LO       _base + 8
+#define REG_CTRL_CMD _base + 0
+#define REG_CTRL_TIME_HI _base + 4
+#define REG_CTRL_TIME_LO _base + 8
 
-#define REG_FC_WINDOW       _base + 6*4 + 0
-#define REG_FC_ENABLE       _base + 6*4 + 4
+#define REG_FC_WINDOW _base + 6 * 4 + 0
+#define REG_FC_ENABLE _base + 6 * 4 + 4
 
 using namespace uhd;
 
-rx_vita_core_3000::~rx_vita_core_3000(void){
+rx_vita_core_3000::~rx_vita_core_3000(void)
+{
     /* NOP */
 }
 
 struct rx_vita_core_3000_impl : rx_vita_core_3000
 {
-    rx_vita_core_3000_impl(
-        wb_iface::sptr iface,
-        const size_t base
-    ):
-        _iface(iface),
-        _base(base),
-        _continuous_streaming(false),
-        _is_setup(false)
+    rx_vita_core_3000_impl(wb_iface::sptr iface, const size_t base)
+        : _iface(iface), _base(base), _continuous_streaming(false), _is_setup(false)
     {
-        this->set_tick_rate(1); //init to non zero
-        this->set_nsamps_per_packet(100); //init to non zero
+        this->set_tick_rate(1); // init to non zero
+        this->set_nsamps_per_packet(100); // init to non zero
         this->clear();
     }
 
     ~rx_vita_core_3000_impl(void)
     {
-        UHD_SAFE_CALL
-        (
-            this->clear();
-        )
+        UHD_SAFE_CALL(this->clear();)
     }
 
     void configure_flow_control(const size_t window_size)
@@ -67,15 +59,15 @@ struct rx_vita_core_3000_impl : rx_vita_core_3000
         // is on the order of kilobytes
         std::this_thread::sleep_for(std::chrono::milliseconds(1));
 
-        _iface->poke32(REG_FC_WINDOW, window_size-1);
-        _iface->poke32(REG_FC_ENABLE, window_size?1:0);
+        _iface->poke32(REG_FC_WINDOW, window_size - 1);
+        _iface->poke32(REG_FC_ENABLE, window_size ? 1 : 0);
     }
 
     void clear(void)
     {
         // FC should never be disabled, this will actually become
         // impossible in the future
-        //this->configure_flow_control(0); //disable fc
+        // this->configure_flow_control(0); //disable fc
     }
 
     void set_nsamps_per_packet(const size_t nsamps)
@@ -83,43 +75,50 @@ struct rx_vita_core_3000_impl : rx_vita_core_3000
         _iface->poke32(REG_FRAMER_MAXLEN, nsamps);
     }
 
-    void issue_stream_command(const uhd::stream_cmd_t &stream_cmd)
+    void issue_stream_command(const uhd::stream_cmd_t& stream_cmd)
     {
-        if (not _is_setup)
-        {
-            //UHD_LOGGER_WARNING("CORES") << "rx vita core 3000 issue stream command - not setup yet!";
+        if (not _is_setup) {
+            // UHD_LOGGER_WARNING("CORES") << "rx vita core 3000 issue stream command -
+            // not setup yet!";
             return;
         }
         UHD_ASSERT_THROW(stream_cmd.num_samps <= 0x0fffffff);
-        _continuous_streaming = stream_cmd.stream_mode == stream_cmd_t::STREAM_MODE_START_CONTINUOUS;
+        _continuous_streaming = stream_cmd.stream_mode
+                                == stream_cmd_t::STREAM_MODE_START_CONTINUOUS;
 
-        //setup the mode to instruction flags
+        // setup the mode to instruction flags
         typedef std::tuple<bool, bool, bool, bool> inst_t;
-        static const uhd::dict<stream_cmd_t::stream_mode_t, inst_t> mode_to_inst = boost::assign::map_list_of
-                                                                //reload, chain, samps, stop
-            (stream_cmd_t::STREAM_MODE_START_CONTINUOUS,   inst_t(true,  true,  false, false))
-            (stream_cmd_t::STREAM_MODE_STOP_CONTINUOUS,    inst_t(false, false, false, true))
-            (stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE, inst_t(false, false, true,  false))
-            (stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_MORE, inst_t(false, true,  true,  false))
-        ;
-
-        //setup the instruction flag values
+        static const uhd::dict<stream_cmd_t::stream_mode_t, inst_t> mode_to_inst =
+            boost::assign::map_list_of
+            // reload, chain, samps, stop
+            (stream_cmd_t::STREAM_MODE_START_CONTINUOUS,
+                inst_t(true, true, false, false))(
+                stream_cmd_t::STREAM_MODE_STOP_CONTINUOUS,
+                inst_t(false, false, false, true))(
+                stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE,
+                inst_t(false, false, true, false))(
+                stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_MORE,
+                inst_t(false, true, true, false));
+
+        // setup the instruction flag values
         bool inst_reload, inst_chain, inst_samps, inst_stop;
-        std::tie(inst_reload, inst_chain, inst_samps, inst_stop) = mode_to_inst[stream_cmd.stream_mode];
+        std::tie(inst_reload, inst_chain, inst_samps, inst_stop) =
+            mode_to_inst[stream_cmd.stream_mode];
 
-        //calculate the word from flags and length
+        // calculate the word from flags and length
         uint32_t cmd_word = 0;
-        cmd_word |= uint32_t((stream_cmd.stream_now)? 1 : 0) << 31;
-        cmd_word |= uint32_t((inst_chain)?            1 : 0) << 30;
-        cmd_word |= uint32_t((inst_reload)?           1 : 0) << 29;
-        cmd_word |= uint32_t((inst_stop)?             1 : 0) << 28;
-        cmd_word |= (inst_samps)? stream_cmd.num_samps : ((inst_stop)? 0 : 1);
+        cmd_word |= uint32_t((stream_cmd.stream_now) ? 1 : 0) << 31;
+        cmd_word |= uint32_t((inst_chain) ? 1 : 0) << 30;
+        cmd_word |= uint32_t((inst_reload) ? 1 : 0) << 29;
+        cmd_word |= uint32_t((inst_stop) ? 1 : 0) << 28;
+        cmd_word |= (inst_samps) ? stream_cmd.num_samps : ((inst_stop) ? 0 : 1);
 
-        //issue the stream command
+        // issue the stream command
         _iface->poke32(REG_CTRL_CMD, cmd_word);
-        const uint64_t ticks = (stream_cmd.stream_now)? 0 : stream_cmd.time_spec.to_ticks(_tick_rate);
+        const uint64_t ticks =
+            (stream_cmd.stream_now) ? 0 : stream_cmd.time_spec.to_ticks(_tick_rate);
         _iface->poke32(REG_CTRL_TIME_HI, uint32_t(ticks >> 32));
-        _iface->poke32(REG_CTRL_TIME_LO, uint32_t(ticks >> 0)); //latches the command
+        _iface->poke32(REG_CTRL_TIME_LO, uint32_t(ticks >> 0)); // latches the command
     }
 
     void set_tick_rate(const double rate)
@@ -134,10 +133,11 @@ struct rx_vita_core_3000_impl : rx_vita_core_3000
 
     void handle_overflow(void)
     {
-        if (_continuous_streaming) this->issue_stream_command(stream_cmd_t::STREAM_MODE_START_CONTINUOUS);
+        if (_continuous_streaming)
+            this->issue_stream_command(stream_cmd_t::STREAM_MODE_START_CONTINUOUS);
     }
 
-    void setup(const uhd::stream_args_t &)
+    void setup(const uhd::stream_args_t&)
     {
         _is_setup = true;
     }
@@ -154,10 +154,7 @@ struct rx_vita_core_3000_impl : rx_vita_core_3000
     bool _is_setup;
 };
 
-rx_vita_core_3000::sptr rx_vita_core_3000::make(
-    wb_iface::sptr iface,
-    const size_t base
-)
+rx_vita_core_3000::sptr rx_vita_core_3000::make(wb_iface::sptr iface, const size_t base)
 {
     return rx_vita_core_3000::sptr(new rx_vita_core_3000_impl(iface, base));
 }
diff --git a/host/lib/usrp/cores/spi_core_3000.cpp b/host/lib/usrp/cores/spi_core_3000.cpp
index fb9d9d549..ad9df68dd 100644
--- a/host/lib/usrp/cores/spi_core_3000.cpp
+++ b/host/lib/usrp/cores/spi_core_3000.cpp
@@ -8,8 +8,8 @@
 
 #include <uhd/exception.hpp>
 #include <uhdlib/usrp/cores/spi_core_3000.hpp>
-#include <memory>
 #include <chrono>
+#include <memory>
 #include <mutex>
 #include <thread>
 
diff --git a/host/lib/usrp/cores/time64_core_200.cpp b/host/lib/usrp/cores/time64_core_200.cpp
index 09fa92dcd..a7d5427c1 100644
--- a/host/lib/usrp/cores/time64_core_200.cpp
+++ b/host/lib/usrp/cores/time64_core_200.cpp
@@ -10,17 +10,17 @@
 #include <uhdlib/usrp/cores/time64_core_200.hpp>
 #include <boost/math/special_functions/round.hpp>
 
-#define REG_TIME64_TICKS_HI    _base + 0
-#define REG_TIME64_TICKS_LO    _base + 4
-#define REG_TIME64_FLAGS       _base + 8
-#define REG_TIME64_IMM         _base + 12
-#define REG_TIME64_MIMO_SYNC   _base + 20 //lower byte is delay cycles
+#define REG_TIME64_TICKS_HI _base + 0
+#define REG_TIME64_TICKS_LO _base + 4
+#define REG_TIME64_FLAGS _base + 8
+#define REG_TIME64_IMM _base + 12
+#define REG_TIME64_MIMO_SYNC _base + 20 // lower byte is delay cycles
 
-//pps flags (see above)
+// pps flags (see above)
 #define FLAG_TIME64_PPS_NEGEDGE (0 << 0)
 #define FLAG_TIME64_PPS_POSEDGE (1 << 0)
-#define FLAG_TIME64_PPS_SMA     (0 << 1)
-#define FLAG_TIME64_PPS_MIMO    (1 << 1) //apparently not used
+#define FLAG_TIME64_PPS_SMA (0 << 1)
+#define FLAG_TIME64_PPS_MIMO (1 << 1) // apparently not used
 
 #define FLAG_TIME64_LATCH_NOW 1
 #define FLAG_TIME64_LATCH_NEXT_PPS 0
@@ -29,93 +29,109 @@
 
 using namespace uhd;
 
-time64_core_200::~time64_core_200(void){
+time64_core_200::~time64_core_200(void)
+{
     /* NOP */
 }
 
-class time64_core_200_impl : public time64_core_200{
+class time64_core_200_impl : public time64_core_200
+{
 public:
-    time64_core_200_impl(
-        wb_iface::sptr iface, const size_t base,
-        const readback_bases_type &readback_bases,
-        const size_t mimo_delay_cycles
-    ):
-        _iface(iface), _base(base),
-        _readback_bases(readback_bases),
-        _tick_rate(0.0),
-        _mimo_delay_cycles(mimo_delay_cycles)
+    time64_core_200_impl(wb_iface::sptr iface,
+        const size_t base,
+        const readback_bases_type& readback_bases,
+        const size_t mimo_delay_cycles)
+        : _iface(iface)
+        , _base(base)
+        , _readback_bases(readback_bases)
+        , _tick_rate(0.0)
+        , _mimo_delay_cycles(mimo_delay_cycles)
     {
         _sources.push_back("none");
         _sources.push_back("external");
         _sources.push_back("_external_");
-        if (_mimo_delay_cycles != 0) _sources.push_back("mimo");
+        if (_mimo_delay_cycles != 0)
+            _sources.push_back("mimo");
     }
 
-    void enable_gpsdo(void){
+    void enable_gpsdo(void)
+    {
         _sources.push_back("gpsdo");
     }
 
-    void set_tick_rate(const double rate){
+    void set_tick_rate(const double rate)
+    {
         _tick_rate = rate;
     }
 
-    uhd::time_spec_t get_time_now(void){
-        for (size_t i = 0; i < 3; i++){ //special algorithm because we cant read 64 bits synchronously
+    uhd::time_spec_t get_time_now(void)
+    {
+        for (size_t i = 0; i < 3;
+             i++) { // special algorithm because we cant read 64 bits synchronously
             const uint32_t ticks_hi = _iface->peek32(_readback_bases.rb_hi_now);
             const uint32_t ticks_lo = _iface->peek32(_readback_bases.rb_lo_now);
-            if (ticks_hi != _iface->peek32(_readback_bases.rb_hi_now)) continue;
+            if (ticks_hi != _iface->peek32(_readback_bases.rb_hi_now))
+                continue;
             const uint64_t ticks = (uint64_t(ticks_hi) << 32) | ticks_lo;
             return time_spec_t::from_ticks(ticks, _tick_rate);
         }
         throw uhd::runtime_error("time64_core_200: get time now timeout");
     }
 
-    uhd::time_spec_t get_time_last_pps(void){
-        for (size_t i = 0; i < 3; i++){ //special algorithm because we cant read 64 bits synchronously
+    uhd::time_spec_t get_time_last_pps(void)
+    {
+        for (size_t i = 0; i < 3;
+             i++) { // special algorithm because we cant read 64 bits synchronously
             const uint32_t ticks_hi = _iface->peek32(_readback_bases.rb_hi_pps);
             const uint32_t ticks_lo = _iface->peek32(_readback_bases.rb_lo_pps);
-            if (ticks_hi != _iface->peek32(_readback_bases.rb_hi_pps)) continue;
+            if (ticks_hi != _iface->peek32(_readback_bases.rb_hi_pps))
+                continue;
             const uint64_t ticks = (uint64_t(ticks_hi) << 32) | ticks_lo;
             return time_spec_t::from_ticks(ticks, _tick_rate);
         }
         throw uhd::runtime_error("time64_core_200: get time last pps timeout");
     }
 
-    void set_time_now(const uhd::time_spec_t &time){
+    void set_time_now(const uhd::time_spec_t& time)
+    {
         const uint64_t ticks = time.to_ticks(_tick_rate);
         _iface->poke32(REG_TIME64_TICKS_LO, uint32_t(ticks >> 0));
         _iface->poke32(REG_TIME64_IMM, FLAG_TIME64_LATCH_NOW);
-        _iface->poke32(REG_TIME64_TICKS_HI, uint32_t(ticks >> 32)); //latches all 3
+        _iface->poke32(REG_TIME64_TICKS_HI, uint32_t(ticks >> 32)); // latches all 3
     }
 
-    void set_time_next_pps(const uhd::time_spec_t &time){
+    void set_time_next_pps(const uhd::time_spec_t& time)
+    {
         const uint64_t ticks = time.to_ticks(_tick_rate);
         _iface->poke32(REG_TIME64_TICKS_LO, uint32_t(ticks >> 0));
         _iface->poke32(REG_TIME64_IMM, FLAG_TIME64_LATCH_NEXT_PPS);
-        _iface->poke32(REG_TIME64_TICKS_HI, uint32_t(ticks >> 32)); //latches all 3
+        _iface->poke32(REG_TIME64_TICKS_HI, uint32_t(ticks >> 32)); // latches all 3
     }
 
-    void set_time_source(const std::string &source){
+    void set_time_source(const std::string& source)
+    {
         assert_has(_sources, source, "time source");
 
-        //setup pps flags
-        if (source == "external" or source == "gpsdo"){
-            _iface->poke32(REG_TIME64_FLAGS, FLAG_TIME64_PPS_SMA | FLAG_TIME64_PPS_POSEDGE);
-        }
-        else if (source == "_external_"){
-            _iface->poke32(REG_TIME64_FLAGS, FLAG_TIME64_PPS_SMA | FLAG_TIME64_PPS_NEGEDGE);
+        // setup pps flags
+        if (source == "external" or source == "gpsdo") {
+            _iface->poke32(
+                REG_TIME64_FLAGS, FLAG_TIME64_PPS_SMA | FLAG_TIME64_PPS_POSEDGE);
+        } else if (source == "_external_") {
+            _iface->poke32(
+                REG_TIME64_FLAGS, FLAG_TIME64_PPS_SMA | FLAG_TIME64_PPS_NEGEDGE);
         }
 
-        //setup mimo flags
-        if (source == "mimo"){
-            _iface->poke32(REG_TIME64_MIMO_SYNC, FLAG_TIME64_MIMO_SYNC | (_mimo_delay_cycles & 0xff));
-        }
-        else{
+        // setup mimo flags
+        if (source == "mimo") {
+            _iface->poke32(REG_TIME64_MIMO_SYNC,
+                FLAG_TIME64_MIMO_SYNC | (_mimo_delay_cycles & 0xff));
+        } else {
             _iface->poke32(REG_TIME64_MIMO_SYNC, 0);
         }
     }
 
-    std::vector<std::string> get_time_sources(void){
+    std::vector<std::string> get_time_sources(void)
+    {
         return _sources;
     }
 
@@ -128,6 +144,10 @@ private:
     std::vector<std::string> _sources;
 };
 
-time64_core_200::sptr time64_core_200::make(wb_iface::sptr iface, const size_t base, const readback_bases_type &readback_bases, const size_t mimo_delay_cycles){
+time64_core_200::sptr time64_core_200::make(wb_iface::sptr iface,
+    const size_t base,
+    const readback_bases_type& readback_bases,
+    const size_t mimo_delay_cycles)
+{
     return sptr(new time64_core_200_impl(iface, base, readback_bases, mimo_delay_cycles));
 }
diff --git a/host/lib/usrp/cores/time_core_3000.cpp b/host/lib/usrp/cores/time_core_3000.cpp
index 3fb6c3d57..852c3882e 100644
--- a/host/lib/usrp/cores/time_core_3000.cpp
+++ b/host/lib/usrp/cores/time_core_3000.cpp
@@ -5,44 +5,40 @@
 // SPDX-License-Identifier: GPL-3.0-or-later
 //
 
-#include <uhd/utils/safe_call.hpp>
 #include <uhd/utils/log.hpp>
+#include <uhd/utils/safe_call.hpp>
 #include <uhdlib/usrp/cores/time_core_3000.hpp>
 #include <chrono>
 #include <thread>
 
-#define REG_TIME_HI       _base + 0
-#define REG_TIME_LO       _base + 4
-#define REG_TIME_CTRL     _base + 8
+#define REG_TIME_HI _base + 0
+#define REG_TIME_LO _base + 4
+#define REG_TIME_CTRL _base + 8
 
-#define CTRL_LATCH_TIME_NOW     (1 << 0)
-#define CTRL_LATCH_TIME_PPS     (1 << 1)
-#define CTRL_LATCH_TIME_SYNC    (1 << 2)
+#define CTRL_LATCH_TIME_NOW (1 << 0)
+#define CTRL_LATCH_TIME_PPS (1 << 1)
+#define CTRL_LATCH_TIME_SYNC (1 << 2)
 
 using namespace uhd;
 
-time_core_3000::~time_core_3000(void){
+time_core_3000::~time_core_3000(void)
+{
     /* NOP */
 }
 
 struct time_core_3000_impl : time_core_3000
 {
-    time_core_3000_impl(
-        wb_iface::sptr iface, const size_t base,
-        const readback_bases_type &readback_bases
-    ):
-        _iface(iface),
-        _base(base),
-        _readback_bases(readback_bases)
+    time_core_3000_impl(wb_iface::sptr iface,
+        const size_t base,
+        const readback_bases_type& readback_bases)
+        : _iface(iface), _base(base), _readback_bases(readback_bases)
     {
-        this->set_tick_rate(1); //init to non zero
+        this->set_tick_rate(1); // init to non zero
     }
 
     ~time_core_3000_impl(void)
     {
-        UHD_SAFE_CALL
-        (
-            ;//NOP
+        UHD_SAFE_CALL(; // NOP
         )
     }
 
@@ -57,22 +53,22 @@ struct time_core_3000_impl : time_core_3000
         UHD_LOGGER_DEBUG("CORES") << "Performing timer loopback test... ";
         const time_spec_t time0 = this->get_time_now();
         std::this_thread::sleep_for(std::chrono::milliseconds(sleep_millis));
-        const time_spec_t time1 = this->get_time_now();
+        const time_spec_t time1  = this->get_time_now();
         const double approx_secs = (time1 - time0).get_real_secs();
-        const bool test_fail = (approx_secs > 0.15) or (approx_secs < 0.05);
+        const bool test_fail     = (approx_secs > 0.15) or (approx_secs < 0.05);
         if (test_fail) {
             UHD_LOG_WARNING("CORES", "Timer loopback test failed!");
         } else {
             UHD_LOG_DEBUG("CORES", "Timer loopback test passed.");
         }
 
-        //useful warning for debugging actual rate
-        const size_t ticks_elapsed = size_t(_tick_rate*approx_secs);
-        const size_t approx_rate = size_t(ticks_elapsed/(sleep_millis/1e3));
-        if (test_fail) UHD_LOGGER_WARNING("CORES")
-            << "Expecting clock rate: " << (_tick_rate/1e6) << " MHz\n"
-            << "Approximate clock rate: " << (approx_rate/1e6) << " MHz\n"
-        ;
+        // useful warning for debugging actual rate
+        const size_t ticks_elapsed = size_t(_tick_rate * approx_secs);
+        const size_t approx_rate   = size_t(ticks_elapsed / (sleep_millis / 1e3));
+        if (test_fail)
+            UHD_LOGGER_WARNING("CORES")
+                << "Expecting clock rate: " << (_tick_rate / 1e6) << " MHz\n"
+                << "Approximate clock rate: " << (approx_rate / 1e6) << " MHz\n";
     }
 
     uhd::time_spec_t get_time_now(void)
@@ -87,7 +83,7 @@ struct time_core_3000_impl : time_core_3000
         return time_spec_t::from_ticks(ticks, _tick_rate);
     }
 
-    void set_time_now(const uhd::time_spec_t &time)
+    void set_time_now(const uhd::time_spec_t& time)
     {
         const uint64_t ticks = time.to_ticks(_tick_rate);
         _iface->poke32(REG_TIME_HI, uint32_t(ticks >> 32));
@@ -95,7 +91,7 @@ struct time_core_3000_impl : time_core_3000
         _iface->poke32(REG_TIME_CTRL, CTRL_LATCH_TIME_NOW);
     }
 
-    void set_time_sync(const uhd::time_spec_t &time)
+    void set_time_sync(const uhd::time_spec_t& time)
     {
         const uint64_t ticks = time.to_ticks(_tick_rate);
         _iface->poke32(REG_TIME_HI, uint32_t(ticks >> 32));
@@ -103,7 +99,7 @@ struct time_core_3000_impl : time_core_3000
         _iface->poke32(REG_TIME_CTRL, CTRL_LATCH_TIME_SYNC);
     }
 
-    void set_time_next_pps(const uhd::time_spec_t &time)
+    void set_time_next_pps(const uhd::time_spec_t& time)
     {
         const uint64_t ticks = time.to_ticks(_tick_rate);
         _iface->poke32(REG_TIME_HI, uint32_t(ticks >> 32));
@@ -118,9 +114,7 @@ struct time_core_3000_impl : time_core_3000
 };
 
 time_core_3000::sptr time_core_3000::make(
-    wb_iface::sptr iface, const size_t base,
-    const readback_bases_type &readback_bases
-)
+    wb_iface::sptr iface, const size_t base, const readback_bases_type& readback_bases)
 {
     return time_core_3000::sptr(new time_core_3000_impl(iface, base, readback_bases));
 }
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp
index 6418d7049..8dd48181c 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp
@@ -5,156 +5,173 @@
 // SPDX-License-Identifier: GPL-3.0-or-later
 //
 
-#include <uhdlib/usrp/cores/tx_dsp_core_200.hpp>
-#include <uhdlib/usrp/cores/dsp_core_utils.hpp>
-#include <uhd/types/dict.hpp>
 #include <uhd/exception.hpp>
-#include <uhd/utils/math.hpp>
+#include <uhd/types/dict.hpp>
 #include <uhd/utils/log.hpp>
+#include <uhd/utils/math.hpp>
+#include <uhdlib/usrp/cores/dsp_core_utils.hpp>
+#include <uhdlib/usrp/cores/tx_dsp_core_200.hpp>
 #include <boost/assign/list_of.hpp>
 #include <boost/math/special_functions/round.hpp>
 #include <algorithm>
-#include <cmath>
 #include <chrono>
+#include <cmath>
 #include <thread>
 
-#define REG_DSP_TX_FREQ          _dsp_base + 0
-#define REG_DSP_TX_SCALE_IQ      _dsp_base + 4
-#define REG_DSP_TX_INTERP        _dsp_base + 8
+#define REG_DSP_TX_FREQ _dsp_base + 0
+#define REG_DSP_TX_SCALE_IQ _dsp_base + 4
+#define REG_DSP_TX_INTERP _dsp_base + 8
 
-#define REG_TX_CTRL_CLEAR           _ctrl_base + 0
-#define REG_TX_CTRL_FORMAT          _ctrl_base + 4
-#define REG_TX_CTRL_REPORT_SID      _ctrl_base + 8
-#define REG_TX_CTRL_POLICY          _ctrl_base + 12
-#define REG_TX_CTRL_CYCLES_PER_UP   _ctrl_base + 16
-#define REG_TX_CTRL_PACKETS_PER_UP  _ctrl_base + 20
+#define REG_TX_CTRL_CLEAR _ctrl_base + 0
+#define REG_TX_CTRL_FORMAT _ctrl_base + 4
+#define REG_TX_CTRL_REPORT_SID _ctrl_base + 8
+#define REG_TX_CTRL_POLICY _ctrl_base + 12
+#define REG_TX_CTRL_CYCLES_PER_UP _ctrl_base + 16
+#define REG_TX_CTRL_PACKETS_PER_UP _ctrl_base + 20
 
-#define FLAG_TX_CTRL_POLICY_WAIT          (0x1 << 0)
-#define FLAG_TX_CTRL_POLICY_NEXT_PACKET   (0x1 << 1)
-#define FLAG_TX_CTRL_POLICY_NEXT_BURST    (0x1 << 2)
+#define FLAG_TX_CTRL_POLICY_WAIT (0x1 << 0)
+#define FLAG_TX_CTRL_POLICY_NEXT_PACKET (0x1 << 1)
+#define FLAG_TX_CTRL_POLICY_NEXT_BURST (0x1 << 2)
 
-//enable flag for registers: cycles and packets per update packet
-#define FLAG_TX_CTRL_UP_ENB              (1ul << 31)
+// enable flag for registers: cycles and packets per update packet
+#define FLAG_TX_CTRL_UP_ENB (1ul << 31)
 
-template <class T> T ceil_log2(T num){
-    return std::ceil(std::log(num)/std::log(T(2)));
+template <class T>
+T ceil_log2(T num)
+{
+    return std::ceil(std::log(num) / std::log(T(2)));
 }
 
 using namespace uhd;
 
-tx_dsp_core_200::~tx_dsp_core_200(void){
+tx_dsp_core_200::~tx_dsp_core_200(void)
+{
     /* NOP */
 }
 
-class tx_dsp_core_200_impl : public tx_dsp_core_200{
+class tx_dsp_core_200_impl : public tx_dsp_core_200
+{
 public:
-    tx_dsp_core_200_impl(
-        wb_iface::sptr iface,
-        const size_t dsp_base, const size_t ctrl_base,
-        const uint32_t sid
-    ):
-        _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base), _sid(sid)
+    tx_dsp_core_200_impl(wb_iface::sptr iface,
+        const size_t dsp_base,
+        const size_t ctrl_base,
+        const uint32_t sid)
+        : _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base), _sid(sid)
     {
         // previously uninitialized - assuming zero for all
         _tick_rate = _link_rate = _host_extra_scaling = _fxpt_scalar_correction = 0.0;
 
-        //init to something so update method has reasonable defaults
+        // init to something so update method has reasonable defaults
         _scaling_adjustment = 1.0;
-        _dsp_extra_scaling = 1.0;
+        _dsp_extra_scaling  = 1.0;
 
-        //init the tx control registers
+        // init the tx control registers
         this->clear();
         this->set_underflow_policy("next_packet");
     }
 
-    void clear(void){
-        _iface->poke32(REG_TX_CTRL_CLEAR, 1); //reset and flush technique
+    void clear(void)
+    {
+        _iface->poke32(REG_TX_CTRL_CLEAR, 1); // reset and flush technique
         std::this_thread::sleep_for(std::chrono::milliseconds(10));
         _iface->poke32(REG_TX_CTRL_CLEAR, 0);
         _iface->poke32(REG_TX_CTRL_REPORT_SID, _sid);
     }
 
-    void set_underflow_policy(const std::string &policy){
-        if (policy == "next_packet"){
+    void set_underflow_policy(const std::string& policy)
+    {
+        if (policy == "next_packet") {
             _iface->poke32(REG_TX_CTRL_POLICY, FLAG_TX_CTRL_POLICY_NEXT_PACKET);
-        }
-        else if (policy == "next_burst"){
+        } else if (policy == "next_burst") {
             _iface->poke32(REG_TX_CTRL_POLICY, FLAG_TX_CTRL_POLICY_NEXT_BURST);
-        }
-        else throw uhd::value_error("USRP TX cannot handle requested underflow policy: " + policy);
+        } else
+            throw uhd::value_error(
+                "USRP TX cannot handle requested underflow policy: " + policy);
     }
 
-    void set_tick_rate(const double rate){
+    void set_tick_rate(const double rate)
+    {
         _tick_rate = rate;
     }
 
-    void set_link_rate(const double rate){
+    void set_link_rate(const double rate)
+    {
         //_link_rate = rate/sizeof(uint32_t); //in samps/s
-        _link_rate = rate/sizeof(uint16_t); //in samps/s (allows for 8sc)
+        _link_rate = rate / sizeof(uint16_t); // in samps/s (allows for 8sc)
     }
 
-    uhd::meta_range_t get_host_rates(void){
+    uhd::meta_range_t get_host_rates(void)
+    {
         meta_range_t range;
-        for (int rate = 512; rate > 256; rate -= 4){
-            range.push_back(range_t(_tick_rate/rate));
+        for (int rate = 512; rate > 256; rate -= 4) {
+            range.push_back(range_t(_tick_rate / rate));
         }
-        for (int rate = 256; rate > 128; rate -= 2){
-            range.push_back(range_t(_tick_rate/rate));
+        for (int rate = 256; rate > 128; rate -= 2) {
+            range.push_back(range_t(_tick_rate / rate));
         }
-        for (int rate = 128; rate >= int(std::ceil(_tick_rate/_link_rate)); rate -= 1){
-            range.push_back(range_t(_tick_rate/rate));
+        for (int rate = 128; rate >= int(std::ceil(_tick_rate / _link_rate)); rate -= 1) {
+            range.push_back(range_t(_tick_rate / rate));
         }
         return range;
     }
 
-    double set_host_rate(const double rate){
-        const size_t interp_rate = boost::math::iround(_tick_rate/this->get_host_rates().clip(rate, true));
+    double set_host_rate(const double rate)
+    {
+        const size_t interp_rate =
+            boost::math::iround(_tick_rate / this->get_host_rates().clip(rate, true));
         size_t interp = interp_rate;
 
-        //determine which half-band filters are activated
+        // determine which half-band filters are activated
         int hb0 = 0, hb1 = 0;
-        if (interp % 2 == 0){
+        if (interp % 2 == 0) {
             hb0 = 1;
             interp /= 2;
         }
-        if (interp % 2 == 0){
+        if (interp % 2 == 0) {
             hb1 = 1;
             interp /= 2;
         }
 
         _iface->poke32(REG_DSP_TX_INTERP, (hb1 << 9) | (hb0 << 8) | (interp & 0xff));
 
-        if (interp > 1 and hb0 == 0 and hb1 == 0)
-        {
-            UHD_LOGGER_WARNING("CORES") << boost::format(
-                "The requested interpolation is odd; the user should expect CIC rolloff.\n"
-                "Select an even interpolation to ensure that a halfband filter is enabled.\n"
-                "interpolation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n"
-            ) % interp_rate % (_tick_rate/1e6) % (rate/1e6);
+        if (interp > 1 and hb0 == 0 and hb1 == 0) {
+            UHD_LOGGER_WARNING("CORES")
+                << boost::format(
+                       "The requested interpolation is odd; the user should expect CIC "
+                       "rolloff.\n"
+                       "Select an even interpolation to ensure that a halfband filter is "
+                       "enabled.\n"
+                       "interpolation = dsp_rate/samp_rate -> %d = (%f MHz)/(%f MHz)\n")
+                       % interp_rate % (_tick_rate / 1e6) % (rate / 1e6);
         }
 
         // Calculate CIC interpolation (i.e., without halfband interpolators)
         // Calculate closest multiplier constant to reverse gain absent scale multipliers
         const double rate_pow = std::pow(double(interp & 0xff), 3);
-        _scaling_adjustment = std::pow(2, ceil_log2(rate_pow))/(1.65*rate_pow);
+        _scaling_adjustment   = std::pow(2, ceil_log2(rate_pow)) / (1.65 * rate_pow);
         this->update_scalar();
 
-        return _tick_rate/interp_rate;
+        return _tick_rate / interp_rate;
     }
 
-    void update_scalar(void){
+    void update_scalar(void)
+    {
         const double factor = 1.0 + std::max(ceil_log2(_scaling_adjustment), 0.0);
-        const double target_scalar = (1 << 17)*_scaling_adjustment/_dsp_extra_scaling/factor;
+        const double target_scalar =
+            (1 << 17) * _scaling_adjustment / _dsp_extra_scaling / factor;
         const int32_t actual_scalar = boost::math::iround(target_scalar);
-        _fxpt_scalar_correction = target_scalar/actual_scalar*factor; //should be small
+        _fxpt_scalar_correction =
+            target_scalar / actual_scalar * factor; // should be small
         _iface->poke32(REG_DSP_TX_SCALE_IQ, actual_scalar);
     }
 
-    double get_scaling_adjustment(void){
-        return _fxpt_scalar_correction*_host_extra_scaling*32767.;
+    double get_scaling_adjustment(void)
+    {
+        return _fxpt_scalar_correction * _host_extra_scaling * 32767.;
     }
 
-    double set_freq(const double requested_freq){
+    double set_freq(const double requested_freq)
+    {
         double actual_freq;
         int32_t freq_word;
         get_freq_and_freq_word(requested_freq, _tick_rate, actual_freq, freq_word);
@@ -162,32 +179,39 @@ public:
         return actual_freq;
     }
 
-    uhd::meta_range_t get_freq_range(void){
-        return uhd::meta_range_t(-_tick_rate/2, +_tick_rate/2, _tick_rate/std::pow(2.0, 32));
+    uhd::meta_range_t get_freq_range(void)
+    {
+        return uhd::meta_range_t(
+            -_tick_rate / 2, +_tick_rate / 2, _tick_rate / std::pow(2.0, 32));
     }
 
-    void set_updates(const size_t cycles_per_up, const size_t packets_per_up){
-        _iface->poke32(REG_TX_CTRL_CYCLES_PER_UP,  (cycles_per_up  == 0)? 0 : (FLAG_TX_CTRL_UP_ENB | cycles_per_up));
-        _iface->poke32(REG_TX_CTRL_PACKETS_PER_UP, (packets_per_up == 0)? 0 : (FLAG_TX_CTRL_UP_ENB | packets_per_up));
+    void set_updates(const size_t cycles_per_up, const size_t packets_per_up)
+    {
+        _iface->poke32(REG_TX_CTRL_CYCLES_PER_UP,
+            (cycles_per_up == 0) ? 0 : (FLAG_TX_CTRL_UP_ENB | cycles_per_up));
+        _iface->poke32(REG_TX_CTRL_PACKETS_PER_UP,
+            (packets_per_up == 0) ? 0 : (FLAG_TX_CTRL_UP_ENB | packets_per_up));
     }
 
-    void setup(const uhd::stream_args_t &stream_args){
-        if (not stream_args.args.has_key("noclear")) this->clear();
+    void setup(const uhd::stream_args_t& stream_args)
+    {
+        if (not stream_args.args.has_key("noclear"))
+            this->clear();
 
         unsigned format_word = 0;
-        if (stream_args.otw_format == "sc16"){
-            format_word = 0;
-            _dsp_extra_scaling = 1.0;
+        if (stream_args.otw_format == "sc16") {
+            format_word         = 0;
+            _dsp_extra_scaling  = 1.0;
             _host_extra_scaling = 1.0;
-        }
-        else if (stream_args.otw_format == "sc8"){
-            format_word = (1 << 0);
-            double peak = stream_args.args.cast<double>("peak", 1.0);
-            peak = std::max(peak, 1.0/256);
-            _host_extra_scaling = 1.0/peak/256;
-            _dsp_extra_scaling = 1.0/peak;
-        }
-        else throw uhd::value_error("USRP TX cannot handle requested wire format: " + stream_args.otw_format);
+        } else if (stream_args.otw_format == "sc8") {
+            format_word         = (1 << 0);
+            double peak         = stream_args.args.cast<double>("peak", 1.0);
+            peak                = std::max(peak, 1.0 / 256);
+            _host_extra_scaling = 1.0 / peak / 256;
+            _dsp_extra_scaling  = 1.0 / peak;
+        } else
+            throw uhd::value_error(
+                "USRP TX cannot handle requested wire format: " + stream_args.otw_format);
 
         _host_extra_scaling /= stream_args.args.cast<double>("fullscale", 1.0);
 
@@ -195,7 +219,7 @@ public:
 
         _iface->poke32(REG_TX_CTRL_FORMAT, format_word);
 
-        if (stream_args.args.has_key("underflow_policy")){
+        if (stream_args.args.has_key("underflow_policy")) {
             this->set_underflow_policy(stream_args.args["underflow_policy"]);
         }
     }
@@ -204,10 +228,15 @@ private:
     wb_iface::sptr _iface;
     const size_t _dsp_base, _ctrl_base;
     double _tick_rate, _link_rate;
-    double _scaling_adjustment, _dsp_extra_scaling, _host_extra_scaling, _fxpt_scalar_correction;
+    double _scaling_adjustment, _dsp_extra_scaling, _host_extra_scaling,
+        _fxpt_scalar_correction;
     const uint32_t _sid;
 };
 
-tx_dsp_core_200::sptr tx_dsp_core_200::make(wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, const uint32_t sid){
+tx_dsp_core_200::sptr tx_dsp_core_200::make(wb_iface::sptr iface,
+    const size_t dsp_base,
+    const size_t ctrl_base,
+    const uint32_t sid)
+{
     return sptr(new tx_dsp_core_200_impl(iface, dsp_base, ctrl_base, sid));
 }
diff --git a/host/lib/usrp/cores/tx_dsp_core_3000.cpp b/host/lib/usrp/cores/tx_dsp_core_3000.cpp
index c89b684fa..3b0d85c00 100644
--- a/host/lib/usrp/cores/tx_dsp_core_3000.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_3000.cpp
@@ -187,10 +187,12 @@ public:
             .set_publisher(std::bind(&tx_dsp_core_3000::get_host_rates, this));
         subtree->create<double>("rate/value")
             .set(DEFAULT_RATE)
-            .set_coercer(std::bind(&tx_dsp_core_3000::set_host_rate, this, std::placeholders::_1));
+            .set_coercer(
+                std::bind(&tx_dsp_core_3000::set_host_rate, this, std::placeholders::_1));
         subtree->create<double>("freq/value")
             .set(DEFAULT_CORDIC_FREQ)
-            .set_coercer(std::bind(&tx_dsp_core_3000::set_freq, this, std::placeholders::_1))
+            .set_coercer(
+                std::bind(&tx_dsp_core_3000::set_freq, this, std::placeholders::_1))
             .set_publisher([this]() { return this->get_freq(); });
         subtree->create<meta_range_t>("freq/range")
             .set_publisher(std::bind(&tx_dsp_core_3000::get_freq_range, this));
diff --git a/host/lib/usrp/cores/tx_frontend_core_200.cpp b/host/lib/usrp/cores/tx_frontend_core_200.cpp
index c02ce755a..46a79c497 100644
--- a/host/lib/usrp/cores/tx_frontend_core_200.cpp
+++ b/host/lib/usrp/cores/tx_frontend_core_200.cpp
@@ -5,68 +5,78 @@
 // SPDX-License-Identifier: GPL-3.0-or-later
 //
 
-#include <uhdlib/usrp/cores/tx_frontend_core_200.hpp>
+#include <uhd/exception.hpp>
 #include <uhd/types/dict.hpp>
 #include <uhd/types/ranges.hpp>
-#include <uhd/exception.hpp>
+#include <uhdlib/usrp/cores/tx_frontend_core_200.hpp>
 #include <boost/assign/list_of.hpp>
 #include <boost/math/special_functions/round.hpp>
 #include <functional>
 
 using namespace uhd;
 
-#define REG_TX_FE_DC_OFFSET_I         _base + 0 * _offset  //24 bits
-#define REG_TX_FE_DC_OFFSET_Q         _base + 1 * _offset  //24 bits
-#define REG_TX_FE_MAG_CORRECTION      _base + 2 * _offset  //18 bits
-#define REG_TX_FE_PHASE_CORRECTION    _base + 3 * _offset  //18 bits
-#define REG_TX_FE_MUX                 _base + 4 * _offset  //8 bits (std output = 0x10, reversed = 0x01)
+#define REG_TX_FE_DC_OFFSET_I _base + 0 * _offset // 24 bits
+#define REG_TX_FE_DC_OFFSET_Q _base + 1 * _offset // 24 bits
+#define REG_TX_FE_MAG_CORRECTION _base + 2 * _offset // 18 bits
+#define REG_TX_FE_PHASE_CORRECTION _base + 3 * _offset // 18 bits
+#define REG_TX_FE_MUX _base + 4 * _offset // 8 bits (std output = 0x10, reversed = 0x01)
 
-const std::complex<double> tx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE = std::complex<double>(0.0, 0.0);
-const std::complex<double> tx_frontend_core_200::DEFAULT_IQ_BALANCE_VALUE = std::complex<double>(0.0, 0.0);
+const std::complex<double> tx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE =
+    std::complex<double>(0.0, 0.0);
+const std::complex<double> tx_frontend_core_200::DEFAULT_IQ_BALANCE_VALUE =
+    std::complex<double>(0.0, 0.0);
 
 namespace {
-  static const double DC_OFFSET_MIN = -1.0;
-  static const double DC_OFFSET_MAX = 1.0;
-}
+static const double DC_OFFSET_MIN = -1.0;
+static const double DC_OFFSET_MAX = 1.0;
+} // namespace
 
-static uint32_t fs_to_bits(const double num, const size_t bits){
-    return int32_t(boost::math::round(num * (1 << (bits-1))));
+static uint32_t fs_to_bits(const double num, const size_t bits)
+{
+    return int32_t(boost::math::round(num * (1 << (bits - 1))));
 }
 
-tx_frontend_core_200::~tx_frontend_core_200(void){
+tx_frontend_core_200::~tx_frontend_core_200(void)
+{
     /* NOP */
 }
 
-class tx_frontend_core_200_impl : public tx_frontend_core_200{
+class tx_frontend_core_200_impl : public tx_frontend_core_200
+{
 public:
-    tx_frontend_core_200_impl(wb_iface::sptr iface, const size_t base, const size_t offset):
-        _iface(iface), _base(base), _offset(offset)
+    tx_frontend_core_200_impl(
+        wb_iface::sptr iface, const size_t base, const size_t offset)
+        : _iface(iface), _base(base), _offset(offset)
     {
-        //NOP
+        // NOP
     }
 
-    void set_mux(const std::string &mode){
-        static const uhd::dict<std::string, uint32_t> mode_to_mux = boost::assign::map_list_of
-            ("IQ", (0x1 << 4) | (0x0 << 0)) //DAC0Q=DUC0Q, DAC0I=DUC0I
-            ("QI", (0x0 << 4) | (0x1 << 0)) //DAC0Q=DUC0I, DAC0I=DUC0Q
-            ("I",  (0xf << 4) | (0x0 << 0)) //DAC0Q=ZERO,  DAC0I=DUC0I
-            ("Q",  (0x0 << 4) | (0xf << 0)) //DAC0Q=DUC0I, DAC0I=ZERO
-        ;
+    void set_mux(const std::string& mode)
+    {
+        static const uhd::dict<std::string, uint32_t> mode_to_mux =
+            boost::assign::map_list_of(
+                "IQ", (0x1 << 4) | (0x0 << 0)) // DAC0Q=DUC0Q, DAC0I=DUC0I
+            ("QI", (0x0 << 4) | (0x1 << 0)) // DAC0Q=DUC0I, DAC0I=DUC0Q
+            ("I", (0xf << 4) | (0x0 << 0)) // DAC0Q=ZERO,  DAC0I=DUC0I
+            ("Q", (0x0 << 4) | (0xf << 0)) // DAC0Q=DUC0I, DAC0I=ZERO
+            ;
         _iface->poke32(REG_TX_FE_MUX, mode_to_mux[mode]);
     }
 
-    std::complex<double> set_dc_offset(const std::complex<double> &off){
+    std::complex<double> set_dc_offset(const std::complex<double>& off)
+    {
         static const double scaler = double(1ul << 23);
-        const int32_t i_dc_off = boost::math::iround(off.real()*scaler);
-        const int32_t q_dc_off = boost::math::iround(off.imag()*scaler);
+        const int32_t i_dc_off     = boost::math::iround(off.real() * scaler);
+        const int32_t q_dc_off     = boost::math::iround(off.imag() * scaler);
 
         _iface->poke32(REG_TX_FE_DC_OFFSET_I, i_dc_off);
         _iface->poke32(REG_TX_FE_DC_OFFSET_Q, q_dc_off);
 
-        return std::complex<double>(i_dc_off/scaler, q_dc_off/scaler);
+        return std::complex<double>(i_dc_off / scaler, q_dc_off / scaler);
     }
 
-    void set_iq_balance(const std::complex<double> &cor){
+    void set_iq_balance(const std::complex<double>& cor)
+    {
         _iface->poke32(REG_TX_FE_MAG_CORRECTION, fs_to_bits(cor.real(), 18));
         _iface->poke32(REG_TX_FE_PHASE_CORRECTION, fs_to_bits(cor.imag(), 18));
     }
@@ -74,16 +84,15 @@ public:
     void populate_subtree(uhd::property_tree::sptr subtree)
     {
         subtree->create<uhd::meta_range_t>("dc_offset/range")
-            .set(meta_range_t(DC_OFFSET_MIN, DC_OFFSET_MAX))
-        ;
-        subtree->create< std::complex<double> >("dc_offset/value")
+            .set(meta_range_t(DC_OFFSET_MIN, DC_OFFSET_MAX));
+        subtree->create<std::complex<double>>("dc_offset/value")
             .set(DEFAULT_DC_OFFSET_VALUE)
-            .set_coercer(std::bind(&tx_frontend_core_200::set_dc_offset, this, std::placeholders::_1))
-        ;
-        subtree->create< std::complex<double> >("iq_balance/value")
+            .set_coercer(std::bind(
+                &tx_frontend_core_200::set_dc_offset, this, std::placeholders::_1));
+        subtree->create<std::complex<double>>("iq_balance/value")
             .set(DEFAULT_IQ_BALANCE_VALUE)
-            .add_coerced_subscriber(std::bind(&tx_frontend_core_200::set_iq_balance, this, std::placeholders::_1))
-        ;
+            .add_coerced_subscriber(std::bind(
+                &tx_frontend_core_200::set_iq_balance, this, std::placeholders::_1));
     }
 
 private:
@@ -92,6 +101,8 @@ private:
     const size_t _offset;
 };
 
-tx_frontend_core_200::sptr tx_frontend_core_200::make(wb_iface::sptr iface, const size_t base, const size_t offset){
+tx_frontend_core_200::sptr tx_frontend_core_200::make(
+    wb_iface::sptr iface, const size_t base, const size_t offset)
+{
     return sptr(new tx_frontend_core_200_impl(iface, base, offset));
 }
diff --git a/host/lib/usrp/cores/tx_vita_core_3000.cpp b/host/lib/usrp/cores/tx_vita_core_3000.cpp
index 689a6cf45..c89301464 100644
--- a/host/lib/usrp/cores/tx_vita_core_3000.cpp
+++ b/host/lib/usrp/cores/tx_vita_core_3000.cpp
@@ -8,35 +8,35 @@
 #include <uhd/utils/safe_call.hpp>
 #include <uhdlib/usrp/cores/tx_vita_core_3000.hpp>
 
-#define REG_CTRL_ERROR_POLICY       (_base + 0)
-#define REG_FC_PRE_RADIO_RESP_BASE  (_base + 2*4)
-#define REG_FC_PRE_FIFO_RESP_BASE   (_base + 4*4)
-#define REG_CTRL_FC_CYCLE_OFFSET    (0*4)
-#define REG_CTRL_FC_PACKET_OFFSET   (1*4)
+#define REG_CTRL_ERROR_POLICY (_base + 0)
+#define REG_FC_PRE_RADIO_RESP_BASE (_base + 2 * 4)
+#define REG_FC_PRE_FIFO_RESP_BASE (_base + 4 * 4)
+#define REG_CTRL_FC_CYCLE_OFFSET (0 * 4)
+#define REG_CTRL_FC_PACKET_OFFSET (1 * 4)
 
 using namespace uhd;
 
-tx_vita_core_3000::~tx_vita_core_3000(void){
+tx_vita_core_3000::~tx_vita_core_3000(void)
+{
     /* NOP */
 }
 
 struct tx_vita_core_3000_impl : tx_vita_core_3000
 {
     tx_vita_core_3000_impl(
-        wb_iface::sptr iface,
-        const size_t base,
-        fc_monitor_loc fc_location
-    ):
-        _iface(iface),
-        _base(base),
-        _fc_base((fc_location==FC_PRE_RADIO or fc_location==FC_DEFAULT) ?
-                    REG_FC_PRE_RADIO_RESP_BASE : REG_FC_PRE_FIFO_RESP_BASE),
-        _fc_location(fc_location)
+        wb_iface::sptr iface, const size_t base, fc_monitor_loc fc_location)
+        : _iface(iface)
+        , _base(base)
+        , _fc_base((fc_location == FC_PRE_RADIO or fc_location == FC_DEFAULT)
+                       ? REG_FC_PRE_RADIO_RESP_BASE
+                       : REG_FC_PRE_FIFO_RESP_BASE)
+        , _fc_location(fc_location)
     {
         if (fc_location != FC_DEFAULT) {
-            //Turn off the other FC monitoring module
-            const size_t other_fc_base = (fc_location==FC_PRE_RADIO) ?
-                    REG_FC_PRE_FIFO_RESP_BASE : REG_FC_PRE_RADIO_RESP_BASE;
+            // Turn off the other FC monitoring module
+            const size_t other_fc_base = (fc_location == FC_PRE_RADIO)
+                                             ? REG_FC_PRE_FIFO_RESP_BASE
+                                             : REG_FC_PRE_RADIO_RESP_BASE;
             _iface->poke32(other_fc_base + REG_CTRL_FC_CYCLE_OFFSET, 0);
             _iface->poke32(other_fc_base + REG_CTRL_FC_PACKET_OFFSET, 0);
         }
@@ -46,75 +46,67 @@ struct tx_vita_core_3000_impl : tx_vita_core_3000
 
     ~tx_vita_core_3000_impl(void)
     {
-        UHD_SAFE_CALL
-        (
-            this->clear();
-        )
+        UHD_SAFE_CALL(this->clear();)
     }
 
     void clear(void)
     {
         this->configure_flow_control(0, 0);
-        this->set_underflow_policy(_policy); //clears the seq
+        this->set_underflow_policy(_policy); // clears the seq
     }
 
-    void set_underflow_policy(const std::string &policy)
+    void set_underflow_policy(const std::string& policy)
     {
-        if (policy == "next_packet")
-        {
+        if (policy == "next_packet") {
             _iface->poke32(REG_CTRL_ERROR_POLICY, (1 << 1));
-        }
-        else if (policy == "next_burst")
-        {
+        } else if (policy == "next_burst") {
             _iface->poke32(REG_CTRL_ERROR_POLICY, (1 << 2));
-        }
-        else if (policy == "wait")
-        {
+        } else if (policy == "wait") {
             _iface->poke32(REG_CTRL_ERROR_POLICY, (1 << 0));
-        }
-        else throw uhd::value_error("USRP TX cannot handle requested underflow policy: " + policy);
+        } else
+            throw uhd::value_error(
+                "USRP TX cannot handle requested underflow policy: " + policy);
         _policy = policy;
     }
 
-    void setup(const uhd::stream_args_t &stream_args)
+    void setup(const uhd::stream_args_t& stream_args)
     {
-        if (stream_args.args.has_key("underflow_policy"))
-        {
+        if (stream_args.args.has_key("underflow_policy")) {
             this->set_underflow_policy(stream_args.args["underflow_policy"]);
         }
     }
 
     void configure_flow_control(const size_t cycs_per_up, const size_t pkts_per_up)
     {
-        if (cycs_per_up == 0) _iface->poke32(_fc_base + REG_CTRL_FC_CYCLE_OFFSET, 0);
-        else _iface->poke32(_fc_base + REG_CTRL_FC_CYCLE_OFFSET, (1 << 31) | ((cycs_per_up) & 0xffffff));
+        if (cycs_per_up == 0)
+            _iface->poke32(_fc_base + REG_CTRL_FC_CYCLE_OFFSET, 0);
+        else
+            _iface->poke32(_fc_base + REG_CTRL_FC_CYCLE_OFFSET,
+                (1 << 31) | ((cycs_per_up)&0xffffff));
 
-        if (pkts_per_up == 0) _iface->poke32(_fc_base + REG_CTRL_FC_PACKET_OFFSET, 0);
-        else _iface->poke32(_fc_base + REG_CTRL_FC_PACKET_OFFSET, (1 << 31) | ((pkts_per_up) & 0xffff));
+        if (pkts_per_up == 0)
+            _iface->poke32(_fc_base + REG_CTRL_FC_PACKET_OFFSET, 0);
+        else
+            _iface->poke32(
+                _fc_base + REG_CTRL_FC_PACKET_OFFSET, (1 << 31) | ((pkts_per_up)&0xffff));
     }
 
-    wb_iface::sptr  _iface;
-    const size_t    _base;
-    const size_t    _fc_base;
-    std::string     _policy;
-    fc_monitor_loc  _fc_location;
-
+    wb_iface::sptr _iface;
+    const size_t _base;
+    const size_t _fc_base;
+    std::string _policy;
+    fc_monitor_loc _fc_location;
 };
 
 tx_vita_core_3000::sptr tx_vita_core_3000::make(
-    wb_iface::sptr iface,
-    const size_t base,
-    fc_monitor_loc fc_location
-)
+    wb_iface::sptr iface, const size_t base, fc_monitor_loc fc_location)
 {
     return tx_vita_core_3000::sptr(new tx_vita_core_3000_impl(iface, base, fc_location));
 }
 
 tx_vita_core_3000::sptr tx_vita_core_3000::make_no_radio_buff(
-    wb_iface::sptr iface,
-    const size_t base
-)
+    wb_iface::sptr iface, const size_t base)
 {
-    //No internal radio buffer so only pre-radio monitoring is supported.
+    // No internal radio buffer so only pre-radio monitoring is supported.
     return tx_vita_core_3000::sptr(new tx_vita_core_3000_impl(iface, base, FC_DEFAULT));
 }
diff --git a/host/lib/usrp/cores/user_settings_core_200.cpp b/host/lib/usrp/cores/user_settings_core_200.cpp
index 7de18d11c..c3606738a 100644
--- a/host/lib/usrp/cores/user_settings_core_200.cpp
+++ b/host/lib/usrp/cores/user_settings_core_200.cpp
@@ -9,22 +9,25 @@
 
 using namespace uhd;
 
-#define REG_USER_ADDR             _base + 0
-#define REG_USER_DATA             _base + 4
+#define REG_USER_ADDR _base + 0
+#define REG_USER_DATA _base + 4
 
-user_settings_core_200::~user_settings_core_200(void){
+user_settings_core_200::~user_settings_core_200(void)
+{
     /* NOP */
 }
 
-class user_settings_core_200_impl : public user_settings_core_200{
+class user_settings_core_200_impl : public user_settings_core_200
+{
 public:
-    user_settings_core_200_impl(wb_iface::sptr iface, const size_t base):
-        _iface(iface), _base(base)
+    user_settings_core_200_impl(wb_iface::sptr iface, const size_t base)
+        : _iface(iface), _base(base)
     {
-        //NOP
+        // NOP
     }
 
-    void set_reg(const user_reg_t &reg){
+    void set_reg(const user_reg_t& reg)
+    {
         _iface->poke32(REG_USER_ADDR, reg.first);
         _iface->poke32(REG_USER_DATA, reg.second);
     }
@@ -34,6 +37,8 @@ private:
     const size_t _base;
 };
 
-user_settings_core_200::sptr user_settings_core_200::make(wb_iface::sptr iface, const size_t base){
+user_settings_core_200::sptr user_settings_core_200::make(
+    wb_iface::sptr iface, const size_t base)
+{
     return sptr(new user_settings_core_200_impl(iface, base));
 }
diff --git a/host/lib/usrp/cores/user_settings_core_3000.cpp b/host/lib/usrp/cores/user_settings_core_3000.cpp
index 66baed57a..7518756f7 100644
--- a/host/lib/usrp/cores/user_settings_core_3000.cpp
+++ b/host/lib/usrp/cores/user_settings_core_3000.cpp
@@ -5,53 +5,60 @@
 // SPDX-License-Identifier: GPL-3.0-or-later
 //
 
-#include <uhdlib/usrp/cores/user_settings_core_3000.hpp>
 #include <uhd/exception.hpp>
+#include <uhdlib/usrp/cores/user_settings_core_3000.hpp>
 #include <boost/thread/thread.hpp>
 
 using namespace uhd;
 
-#define REG_USER_SR_ADDR   _sr_base_addr + 0
-#define REG_USER_SR_DATA   _sr_base_addr + 4
-#define REG_USER_RB_ADDR   _sr_base_addr + 8
+#define REG_USER_SR_ADDR _sr_base_addr + 0
+#define REG_USER_SR_DATA _sr_base_addr + 4
+#define REG_USER_RB_ADDR _sr_base_addr + 8
 
-class user_settings_core_3000_impl : public user_settings_core_3000 {
+class user_settings_core_3000_impl : public user_settings_core_3000
+{
 public:
-    user_settings_core_3000_impl(
-        wb_iface::sptr iface,
-        const wb_addr_type sr_base_addr, const wb_addr_type rb_reg_addr):
-        _iface(iface), _sr_base_addr(sr_base_addr), _rb_reg_addr(rb_reg_addr)
+    user_settings_core_3000_impl(wb_iface::sptr iface,
+        const wb_addr_type sr_base_addr,
+        const wb_addr_type rb_reg_addr)
+        : _iface(iface), _sr_base_addr(sr_base_addr), _rb_reg_addr(rb_reg_addr)
     {
     }
 
     void poke64(const wb_addr_type offset, const uint64_t value)
     {
-        if (offset % sizeof(uint64_t) != 0) throw uhd::value_error("poke64: Incorrect address alignment");
+        if (offset % sizeof(uint64_t) != 0)
+            throw uhd::value_error("poke64: Incorrect address alignment");
         poke32(offset, static_cast<uint32_t>(value));
         poke32(offset + 4, static_cast<uint32_t>(value >> 32));
     }
 
     uint64_t peek64(const wb_addr_type offset)
     {
-        if (offset % sizeof(uint64_t) != 0) throw uhd::value_error("peek64: Incorrect address alignment");
+        if (offset % sizeof(uint64_t) != 0)
+            throw uhd::value_error("peek64: Incorrect address alignment");
 
         boost::unique_lock<boost::mutex> lock(_mutex);
-        _iface->poke32(REG_USER_RB_ADDR, offset >> 3);  //Translate byte offset to 64-bit offset
+        _iface->poke32(
+            REG_USER_RB_ADDR, offset >> 3); // Translate byte offset to 64-bit offset
         return _iface->peek64(_rb_reg_addr);
     }
 
     void poke32(const wb_addr_type offset, const uint32_t value)
     {
-        if (offset % sizeof(uint32_t) != 0) throw uhd::value_error("poke32: Incorrect address alignment");
+        if (offset % sizeof(uint32_t) != 0)
+            throw uhd::value_error("poke32: Incorrect address alignment");
 
         boost::unique_lock<boost::mutex> lock(_mutex);
-        _iface->poke32(REG_USER_SR_ADDR, offset >> 2);   //Translate byte offset to 64-bit offset
+        _iface->poke32(
+            REG_USER_SR_ADDR, offset >> 2); // Translate byte offset to 64-bit offset
         _iface->poke32(REG_USER_SR_DATA, value);
     }
 
     uint32_t peek32(const wb_addr_type offset)
     {
-        if (offset % sizeof(uint32_t) != 0) throw uhd::value_error("peek32: Incorrect address alignment");
+        if (offset % sizeof(uint32_t) != 0)
+            throw uhd::value_error("peek32: Incorrect address alignment");
 
         uint64_t value = peek64((offset >> 3) << 3);
         if ((offset & 0x7) == 0) {
@@ -62,14 +69,14 @@ public:
     }
 
 private:
-    wb_iface::sptr      _iface;
-    const wb_addr_type  _sr_base_addr;
-    const wb_addr_type  _rb_reg_addr;
-    boost::mutex        _mutex;
+    wb_iface::sptr _iface;
+    const wb_addr_type _sr_base_addr;
+    const wb_addr_type _rb_reg_addr;
+    boost::mutex _mutex;
 };
 
-wb_iface::sptr user_settings_core_3000::make(wb_iface::sptr iface,
-    const wb_addr_type sr_base_addr, const wb_addr_type rb_reg_addr)
+wb_iface::sptr user_settings_core_3000::make(
+    wb_iface::sptr iface, const wb_addr_type sr_base_addr, const wb_addr_type rb_reg_addr)
 {
     return sptr(new user_settings_core_3000_impl(iface, sr_base_addr, rb_reg_addr));
 }