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author | Paul David <paul.david@ettus.com> | 2016-09-29 14:36:04 -0700 |
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committer | mbr0wn <martin.braun@ettus.com> | 2016-10-05 14:31:53 -0700 |
commit | ed3be5607de7ea20f3ed1a5bfef4a060ade006be (patch) | |
tree | a5ec90c7d18bd91eb63fbe566d0980f15e8705df /host/lib/usrp/common | |
parent | 93990d78520848d00e586d6bae10048c36d2ea89 (diff) | |
download | uhd-ed3be5607de7ea20f3ed1a5bfef4a060ade006be.tar.gz uhd-ed3be5607de7ea20f3ed1a5bfef4a060ade006be.tar.bz2 uhd-ed3be5607de7ea20f3ed1a5bfef4a060ade006be.zip |
max2871: Added label for the bit region VAS_DLY
- Also added a template specialization for enabling the VAS_DLY bit locations based on VAS_TEMP setting (aka retune)
Diffstat (limited to 'host/lib/usrp/common')
-rw-r--r-- | host/lib/usrp/common/max287x.hpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/host/lib/usrp/common/max287x.hpp b/host/lib/usrp/common/max287x.hpp index 596d992e0..540f5207f 100644 --- a/host/lib/usrp/common/max287x.hpp +++ b/host/lib/usrp/common/max287x.hpp @@ -824,6 +824,13 @@ void max287x<max287x_regs_t>::set_auto_retune(bool enabled) _regs.retune = enabled ? max287x_regs_t::RETUNE_ENABLED : max287x_regs_t::RETUNE_DISABLED; } +template <> +inline void max287x<max2871_regs_t>::set_auto_retune(bool enabled) +{ + _regs.retune = enabled ? max2871_regs_t::RETUNE_ENABLED : max2871_regs_t::RETUNE_DISABLED; + _regs.vas_dly = enabled ? max2871_regs_t::VAS_DLY_ENABLED : max2871_regs_t::VAS_DLY_DISABLED; +} + template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_clock_divider_mode(clock_divider_mode_t mode) { |