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author | Ashish Chaudhari <ashish@ettus.com> | 2014-08-01 13:14:56 -0700 |
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committer | Ashish Chaudhari <ashish@ettus.com> | 2014-08-01 13:14:56 -0700 |
commit | c7274790a0b8a812d731320c2b7711efa2e1daa7 (patch) | |
tree | a4e341ffb7e441cf92d903c7dcb263aacf43d9ca /host/lib/usrp/common/ad9361_driver/ad9361_transaction.h | |
parent | 9eb403f4299ea036a8fff2dc22209d3ae06374ed (diff) | |
download | uhd-c7274790a0b8a812d731320c2b7711efa2e1daa7.tar.gz uhd-c7274790a0b8a812d731320c2b7711efa2e1daa7.tar.bz2 uhd-c7274790a0b8a812d731320c2b7711efa2e1daa7.zip |
b200: Moved AD9361 driver to host
- Switched to FPGA SPI engine
- Moved firmware AD9361 driver to UHD
- Bumped FW compat to 5, FPGA compat to 4
- Known Issue: AD9361 SPI rate is too slow
Diffstat (limited to 'host/lib/usrp/common/ad9361_driver/ad9361_transaction.h')
-rw-r--r-- | host/lib/usrp/common/ad9361_driver/ad9361_transaction.h | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_transaction.h b/host/lib/usrp/common/ad9361_driver/ad9361_transaction.h new file mode 100644 index 000000000..06541d2ee --- /dev/null +++ b/host/lib/usrp/common/ad9361_driver/ad9361_transaction.h @@ -0,0 +1,77 @@ +// +// Copyright 2014 Ettus Research LLC +// + +#ifndef INCLUDED_AD9361_TRANSACTION_H +#define INCLUDED_AD9361_TRANSACTION_H + +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif + +//various constants +#define AD9361_TRANSACTION_VERSION 0x5 +#define AD9361_DISPATCH_PACKET_SIZE 64 + +//action types +#define AD9361_ACTION_ECHO 0 +#define AD9361_ACTION_INIT 1 +#define AD9361_ACTION_SET_RX1_GAIN 2 +#define AD9361_ACTION_SET_TX1_GAIN 3 +#define AD9361_ACTION_SET_RX2_GAIN 4 +#define AD9361_ACTION_SET_TX2_GAIN 5 +#define AD9361_ACTION_SET_RX_FREQ 6 +#define AD9361_ACTION_SET_TX_FREQ 7 +#define AD9361_ACTION_SET_CODEC_LOOP 8 +#define AD9361_ACTION_SET_CLOCK_RATE 9 +#define AD9361_ACTION_SET_ACTIVE_CHAINS 10 + +typedef struct +{ + //version is expected to be AD9361_TRANSACTION_VERSION + //check otherwise for compatibility + uint32_t version; + + //sequence number - increment every call for sanity + uint32_t sequence; + + //location info for the ad9361 chip class + uint64_t handle; + + //action tells us what to do, see AD9361_ACTION_* + uint32_t action; + + union + { + //enable mask for chains + uint32_t enable_mask; + + //true to enable codec internal loopback + uint32_t codec_loop; + + //freq holds request LO freq and result from tune + uint32_t freq[2]; + + //gain holds request gain and result from action + uint32_t gain[2]; + + //rate holds request clock rate and result from action + uint32_t rate[2]; + + } value; + + //error message comes back as a reply - + //set to null string for no error \0 + char error_msg[]; + +} ad9361_transaction_t; + +#define AD9361_TRANSACTION_MAX_ERROR_MSG (AD9361_DISPATCH_PACKET_SIZE - (sizeof(ad9361_transaction_t)-4)-1) // -4 for 'error_msg' alignment padding, -1 for terminating \0 + +#ifdef __cplusplus +} +#endif + +#endif /* INCLUDED_AD9361_TRANSACTION_H */ |