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authorAndrej Rode <andrej.rode@ettus.com>2016-12-19 16:28:16 -0800
committerMartin Braun <martin.braun@ettus.com>2017-01-12 15:15:37 -0800
commita12fc913a078c6c2cf16787e64f4f24d448ff2f6 (patch)
tree7b0b72e452551d9770a5b9c5d0ecda2a3fe83da5 /host/lib/usrp/common/ad9361_driver/ad9361_device.h
parent6e3939f4a56e8daa82fe00c130208cbe6db3f7c1 (diff)
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lib: add default ctors to structs and initialize members properly
Diffstat (limited to 'host/lib/usrp/common/ad9361_driver/ad9361_device.h')
-rw-r--r--host/lib/usrp/common/ad9361_driver/ad9361_device.h18
1 files changed, 15 insertions, 3 deletions
diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h
index ae065d78e..f3d24d6b9 100644
--- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h
+++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h
@@ -40,7 +40,15 @@ public:
enum chain_t { CHAIN_1, CHAIN_2, CHAIN_BOTH };
ad9361_device_t(ad9361_params::sptr client, ad9361_io::sptr io_iface) :
- _client_params(client), _io_iface(io_iface) {
+ _client_params(client), _io_iface(io_iface),
+ _bbpll_freq(0.0), _adcclock_freq(0.0), _req_clock_rate(0.0),
+ _req_coreclk(0.0), _rx_bbf_tunediv(0), _curr_gain_table(0),
+ _rx1_gain(0.0), _rx2_gain(0.0), _tx1_gain(0.0), _tx2_gain(0.0),
+ _tfir_factor(0), _rfir_factor(0),
+ _rx1_agc_mode(GAIN_MODE_MANUAL), _rx2_agc_mode(GAIN_MODE_MANUAL),
+ _rx1_agc_enable(false), _rx2_agc_enable(false),
+ _use_dc_offset_tracking(false), _use_iq_balance_tracking(false)
+ {
/*
* This Boost.Assign to_container() workaround is necessary because STL containers
@@ -213,7 +221,11 @@ private: //Methods
void _set_filter_lp_tia_sec(direction_t direction, filter_info_base::sptr filter);
private: //Members
- typedef struct {
+ struct chip_regs_t
+ {
+ chip_regs_t():
+ vcodivs(0), inputsel(0), rxfilt(0), txfilt(0),
+ bbpll(0), bbftune_config(0), bbftune_mode(0) {}
uint8_t vcodivs;
uint8_t inputsel;
uint8_t rxfilt;
@@ -221,7 +233,7 @@ private: //Members
uint8_t bbpll;
uint8_t bbftune_config;
uint8_t bbftune_mode;
- } chip_regs_t;
+ };
struct filter_query_helper
{