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| author | Sugandha Gupta <sugandha.gupta@ettus.com> | 2019-03-05 11:37:13 -0800 |
|---|---|---|
| committer | Brent Stapleton <brent.stapleton@ettus.com> | 2019-05-01 15:17:23 -0700 |
| commit | 7bccabcda1128a412fe21203937cf54f92e0eb15 (patch) | |
| tree | 00a806d8aed3d6922b7d01aadfaa1d5ccbc7b3d3 /host/lib/usrp/common/ad9361_driver/ad9361_device.h | |
| parent | b709c03e8bcf6ff64ab85b87aba8c21ecc3509d3 (diff) | |
| download | uhd-7bccabcda1128a412fe21203937cf54f92e0eb15.tar.gz uhd-7bccabcda1128a412fe21203937cf54f92e0eb15.tar.bz2 uhd-7bccabcda1128a412fe21203937cf54f92e0eb15.zip | |
ad9361: Fix return values for tune and set_clock_rate
This fixes a potential mismatch between the returned frequency and
clock rate and the actual value. The new function get_clock_rate is
need for async call to set_clock_rate in E3xx devices
Diffstat (limited to 'host/lib/usrp/common/ad9361_driver/ad9361_device.h')
| -rw-r--r-- | host/lib/usrp/common/ad9361_driver/ad9361_device.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h index 2da7526f0..57f71193f 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h @@ -161,6 +161,9 @@ public: /* Set SPI interface */ void set_io_iface(ad9361_io::sptr io_iface); + /* Get the current clock rate. */ + double get_clock_rate(); + /* This function sets the RX / TX rate between AD9361 and the FPGA, and * thus determines the interpolation / decimation required in the FPGA to * achieve the user's requested rate. |