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author | Martin Braun <martin.braun@ettus.com> | 2015-06-09 16:17:53 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2015-06-09 16:17:53 -0700 |
commit | 533548a681f0045f1194c4b47f857fa16314784d (patch) | |
tree | d5dbc598b17605d5c4be85fad08f1c766025bb6c /host/lib/usrp/common/ad9361_driver/ad9361_device.h | |
parent | 13f9f07c42c4928ef3adcb1bbee3343198c9ecae (diff) | |
parent | 4d0dadb3cc0106c9026bc41d7d74d55918d13b43 (diff) | |
download | uhd-533548a681f0045f1194c4b47f857fa16314784d.tar.gz uhd-533548a681f0045f1194c4b47f857fa16314784d.tar.bz2 uhd-533548a681f0045f1194c4b47f857fa16314784d.zip |
Merge branch 'maint'
Conflicts:
host/lib/usrp/common/ad9361_ctrl.hpp
host/lib/usrp/common/ad9361_driver/ad9361_device.h
host/lib/usrp/e300/e300_remote_codec_ctrl.hpp
Diffstat (limited to 'host/lib/usrp/common/ad9361_driver/ad9361_device.h')
-rw-r--r-- | host/lib/usrp/common/ad9361_driver/ad9361_device.h | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h index 0c7a7e4f7..1c5c97829 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h @@ -81,6 +81,9 @@ public: * After tuning, it runs any appropriate calibrations. */ double tune(direction_t direction, const double value); + /* Get the current RX or TX frequency. */ + double get_freq(direction_t direction); + /* Set the gain of RX1, RX2, TX1, or TX2. * * Note that the 'value' passed to this function is the actual gain value, @@ -213,10 +216,17 @@ private: //Members //Intermediate state double _rx_freq, _tx_freq, _req_rx_freq, _req_tx_freq; double _last_calibration_freq; - double _baseband_bw, _bbpll_freq, _adcclock_freq; double _rx_analog_bw, _tx_analog_bw, _rx_bb_lp_bw, _tx_bb_lp_bw; double _rx_tia_lp_bw, _tx_sec_lp_bw; - double _req_clock_rate, _req_coreclk; + //! Current baseband sampling rate (this is the actual rate the device is + // is running at) + double _baseband_bw; + double _bbpll_freq, _adcclock_freq; + //! This was the last clock rate value that was requested. + // It is cached so we don't need to re-set the clock rate + // if another call to set_clock_rate() actually has the same value. + double _req_clock_rate; + double _req_coreclk; boost::uint16_t _rx_bbf_tunediv; boost::uint8_t _curr_gain_table; double _rx1_gain, _rx2_gain, _tx1_gain, _tx2_gain; |