b2xx: dc offset and iq imbalance correction control

1 files changed, 101 insertions, 24 deletions

diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp
index f1a82d71c..e5938184c 100644
--- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp
+++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp
@@ -11,6 +11,7 @@
 #include <cmath>
 #include <uhd/exception.hpp>
 #include <uhd/utils/log.hpp>
+#include <uhd/utils/msg.hpp>
 #include <boost/cstdint.hpp>
 #include <boost/date_time/posix_time/posix_time.hpp>
 #include <boost/thread/thread.hpp>
@@ -650,11 +651,12 @@ void ad9361_device_t::_setup_adc()
 }
 
 /* Calibrate the baseband DC offset.
- *
- * Note that this function is called from within the TX quadrature
- * calibration function! */
+ * Disables tracking
+ */
 void ad9361_device_t::_calibrate_baseband_dc_offset()
 {
+    _io_iface->poke8(0x18b, 0x83); //Reset RF DC tracking flag
+
     _io_iface->poke8(0x193, 0x3f); // Calibration settings
     _io_iface->poke8(0x190, 0x0f); // Set tracking coefficient
     //write_ad9361_reg(device, 0x190, /*0x0f*//*0xDF*/0x80*1 | 0x40*1 | (16+8/*+4*/)); // Set tracking coefficient: don't *4 counter, do decim /4, increased gain shift
@@ -674,9 +676,8 @@ void ad9361_device_t::_calibrate_baseband_dc_offset()
 }
 
 /* Calibrate the RF DC offset.
- *
- * Note that this function is called from within the TX quadrature
- * calibration function. */
+ * Disables tracking
+ */
 void ad9361_device_t::_calibrate_rf_dc_offset()
 {
     /* Some settings are frequency-dependent. */
@@ -691,7 +692,7 @@ void ad9361_device_t::_calibrate_rf_dc_offset()
     }
 
     _io_iface->poke8(0x185, 0x20); // RF DC Offset wait count
-    _io_iface->poke8(0x18b, 0x83);
+    _io_iface->poke8(0x18b, 0x83); // Disable tracking
     _io_iface->poke8(0x189, 0x30);
 
     /* Run the calibration! */
@@ -707,6 +708,16 @@ void ad9361_device_t::_calibrate_rf_dc_offset()
     }
 }
 
+void ad9361_device_t::_configure_bb_rf_dc_tracking(const bool on)
+{
+    if(on)
+    {
+        _io_iface->poke8(0x18b, 0xad); // Enable BB and RF DC tracking
+    } else {
+        _io_iface->poke8(0x18b, 0x83); // Disable BB and RF DC tracking
+    }
+}
+
 /* Start the RX quadrature calibration.
  *
  * Note that we are using AD9361's 'tracking' feature for RX quadrature
@@ -719,16 +730,20 @@ void ad9361_device_t::_calibrate_rx_quadrature()
     _io_iface->poke8(0x16e, 0x25); // RX Gain index to use for cal
     _io_iface->poke8(0x16a, 0x75); // Set Kexp phase
     _io_iface->poke8(0x16b, 0x15); // Set Kexp amplitude
-    _io_iface->poke8(0x169, 0xcf); // Continuous tracking mode
-    _io_iface->poke8(0x18b, 0xad);
+
+    if(_use_iq_balance_correction)
+    {
+        _io_iface->poke8(0x169, 0xcf); // Continuous tracking mode. Gets disabled in _tx_quadrature_cal_routine!
+    }
 }
 
-/* TX quadtrature calibration routine.
+/* TX quadrature calibration routine.
  *
  * The TX quadrature needs to be done twice, once for each TX chain, with
  * only one register change in between. Thus, this function enacts the
  * calibrations, and it is called from calibrate_tx_quadrature. */
 void ad9361_device_t::_tx_quadrature_cal_routine() {
+
     /* This is a weird process, but here is how it works:
      * 1) Read the calibrated NCO frequency bits out of 0A3.
      * 2) Write the two bits to the RX NCO freq part of 0A0.
@@ -773,12 +788,6 @@ void ad9361_device_t::_tx_quadrature_cal_routine() {
     _io_iface->poke8(0x0a4, 0xf0); // Cal setting conut
     _io_iface->poke8(0x0ae, 0x00); // Cal LPF gain index (split mode)
 
-    /* First, calibrate the baseband DC offset. */
-    _calibrate_baseband_dc_offset();
-
-    /* Second, calibrate the RF DC offset. */
-    _calibrate_rf_dc_offset();
-
     /* Now, calibrate the TX quadrature! */
     size_t count = 0;
     _io_iface->poke8(0x016, 0x10);
@@ -793,9 +802,7 @@ void ad9361_device_t::_tx_quadrature_cal_routine() {
 }
 
 /* Run the TX quadrature calibration.
- *
- * Note that from within this function we are also triggering the baseband
- * and RF DC calibrations. */
+ */
 void ad9361_device_t::_calibrate_tx_quadrature()
 {
     /* Make sure we are, in fact, in the ALERT state. If not, something is
@@ -879,7 +886,7 @@ void ad9361_device_t::_program_mixer_gm_subtable()
 void ad9361_device_t::_program_gain_table() {
     /* Figure out which gain table we should be using for our current
      * frequency band. */
-    boost::uint8_t (*gain_table)[5] = NULL;
+    boost::uint8_t (*gain_table)[3] = NULL;
     boost::uint8_t new_gain_table;
     if (_rx_freq < 1300e6) {
         gain_table = gain_table_sub_1300mhz;
@@ -910,9 +917,9 @@ void ad9361_device_t::_program_gain_table() {
     boost::uint8_t index = 0;
     for (; index < 77; index++) {
         _io_iface->poke8(0x130, index);
-        _io_iface->poke8(0x131, gain_table[index][1]);
-        _io_iface->poke8(0x132, gain_table[index][2]);
-        _io_iface->poke8(0x133, gain_table[index][3]);
+        _io_iface->poke8(0x131, gain_table[index][0]);
+        _io_iface->poke8(0x132, gain_table[index][1]);
+        _io_iface->poke8(0x133, gain_table[index][2]);
         _io_iface->poke8(0x137, 0x1E);
         _io_iface->poke8(0x134, 0x00);
         _io_iface->poke8(0x134, 0x00);
@@ -1256,6 +1263,7 @@ double ad9361_device_t::_setup_rates(const double rate)
     int divfactor = 0;
     _tfir_factor = 0;
     _rfir_factor = 0;
+
     if (rate < 0.33e6) {
         // RX1 + RX2 enabled, 3, 2, 2, 4
         _regs.rxfilt = B8(11101111);
@@ -1411,6 +1419,8 @@ void ad9361_device_t::initialize()
     _rx2_gain = 0;
     _tx1_gain = 0;
     _tx2_gain = 0;
+    _use_dc_offset_correction = true;
+    _use_iq_balance_correction = true;
 
     /* Reset the device. */
     _io_iface->poke8(0x000, 0x01);
@@ -1563,8 +1573,11 @@ void ad9361_device_t::initialize()
 
     _setup_adc();
 
+    _calibrate_baseband_dc_offset();
+    _calibrate_rf_dc_offset();
     _calibrate_tx_quadrature();
     _calibrate_rx_quadrature();
+    _configure_bb_rf_dc_tracking(_use_dc_offset_correction);
 
     // cals done, set PPORT config
     switch (_client_params->get_digital_interface_mode()) {
@@ -1687,8 +1700,11 @@ double ad9361_device_t::set_clock_rate(const double req_rate)
 
     _setup_adc();
 
+    _calibrate_baseband_dc_offset();
+    _calibrate_rf_dc_offset();
     _calibrate_tx_quadrature();
     _calibrate_rx_quadrature();
+    _configure_bb_rf_dc_tracking(_use_dc_offset_correction);
 
     // cals done, set PPORT config
     switch (_client_params->get_digital_interface_mode()) {
@@ -1841,9 +1857,11 @@ double ad9361_device_t::tune(direction_t direction, const double value)
     _reprogram_gains();
 
     /* Run the calibration algorithms. */
+    _calibrate_baseband_dc_offset();
+    _calibrate_rf_dc_offset();
     _calibrate_tx_quadrature();
     _calibrate_rx_quadrature();
-
+    _configure_bb_rf_dc_tracking(_use_dc_offset_correction); //if this is not done here, bb dc offset is not good
     /* If we were in the FDD state, return it now. */
     if (not_in_alert) {
         _io_iface->poke8(0x014, 0x21);
@@ -1990,4 +2008,63 @@ double ad9361_device_t::get_average_temperature(const double cal_offset, const s
     return d_temp;
 }
 
+void ad9361_device_t::set_dc_offset_auto(direction_t direction, const bool on)
+{
+    if(direction == RX)
+    {
+         _use_dc_offset_correction = on;
+         _configure_bb_rf_dc_tracking(_use_dc_offset_correction);
+        if(on)
+        {
+            _io_iface->poke8(0x182, (_io_iface->peek8(0x182) & (~((1 << 7) | (1 << 6) | (1 << 3) | (1 << 2))))); //Clear force bits
+            //Do a single shot DC offset cal before enabling tracking (Not possible if not in ALERT state. Is it necessary?)
+        } else {
+            //clear current config values
+            _io_iface->poke8(0x182, (_io_iface->peek8(0x182) | ((1 << 7) | (1 << 6) | (1 << 3) | (1 << 2)))); //Set input A and input B&C force enable bits
+            _io_iface->poke8(0x174, 0x00);
+            _io_iface->poke8(0x175, 0x00);
+            _io_iface->poke8(0x176, 0x00);
+            _io_iface->poke8(0x177, 0x00);
+            _io_iface->poke8(0x178, 0x00);
+            _io_iface->poke8(0x17D, 0x00);
+            _io_iface->poke8(0x17E, 0x00);
+            _io_iface->poke8(0x17F, 0x00);
+            _io_iface->poke8(0x180, 0x00);
+            _io_iface->poke8(0x181, 0x00);
+        }
+    } else {
+        // DC offset is removed during TX quad cal
+        throw uhd::runtime_error("[ad9361_device_t] [set_iq_balance_auto] INVALID_CODE_PATH");
+    }
+}
+
+void ad9361_device_t::set_iq_balance_auto(direction_t direction, const bool on)
+{
+    if(direction == RX)
+    {
+        _use_iq_balance_correction = on;
+        if(on)
+        {
+            //disable force registers and enable tracking
+            _io_iface->poke8(0x182, (_io_iface->peek8(0x182) & (~ ( (1<<1) | (1<<0) | (1<<5) | (1<<4) ))));
+            _calibrate_rx_quadrature();
+        } else {
+            //disable IQ tracking
+            _io_iface->poke8(0x169, 0xc0);
+            //clear current config values
+            _io_iface->poke8(0x182, (_io_iface->peek8(0x182) | ((1 << 1) | (1 << 0) | (1 << 5) | (1 << 4)))); //Set Rx2 input B&C force enable bit
+            _io_iface->poke8(0x17B, 0x00);
+            _io_iface->poke8(0x17C, 0x00);
+            _io_iface->poke8(0x179, 0x00);
+            _io_iface->poke8(0x17A, 0x00);
+            _io_iface->poke8(0x170, 0x00);
+            _io_iface->poke8(0x171, 0x00);
+            _io_iface->poke8(0x172, 0x00);
+            _io_iface->poke8(0x173, 0x00);
+        }
+    } else {
+        throw uhd::runtime_error("[ad9361_device_t] [set_iq_balance_auto] INVALID_CODE_PATH");
+    }
+}
+
 }}