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| author | Ashish Chaudhari <ashish@ettus.com> | 2015-07-22 17:57:45 -0700 |
|---|---|---|
| committer | Ashish Chaudhari <ashish@ettus.com> | 2015-07-22 17:57:45 -0700 |
| commit | 1dad62c7801d337db79e7a01310c04ef68a83483 (patch) | |
| tree | d292ce3aef2dcc38583c31d3f08dbe627296b25f /host/lib/usrp/b200/b200_impl.cpp | |
| parent | f76f599be281d773736940d53aafc6d7e9d536ca (diff) | |
| download | uhd-1dad62c7801d337db79e7a01310c04ef68a83483.tar.gz uhd-1dad62c7801d337db79e7a01310c04ef68a83483.tar.bz2 uhd-1dad62c7801d337db79e7a01310c04ef68a83483.zip | |
x300: Updated CLK->DATA delay for ADC
- The value was originally empirically determined based on self-cal
results. After the fix for uncalibrated IDELAY, the self-cal offset
data was no longer correct.
- The new delay through the ADC ensures that the self-cal nominally
pick the halfway tap of 16
Diffstat (limited to 'host/lib/usrp/b200/b200_impl.cpp')
0 files changed, 0 insertions, 0 deletions