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| author | Martin Braun <martin.braun@ettus.com> | 2021-01-08 09:33:36 +0100 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2021-03-04 08:07:26 -0600 |
| commit | 107a49c0c236940da7d3bd0f57da4bc1e2a34cb4 (patch) | |
| tree | fdeaad56030a02948377c45838dab97beb7a5c84 /host/lib/usrp/b200/b200_impl.cpp | |
| parent | 7d5e48032baa62cbe7467833b9e057900602f4b9 (diff) | |
| download | uhd-107a49c0c236940da7d3bd0f57da4bc1e2a34cb4.tar.gz uhd-107a49c0c236940da7d3bd0f57da4bc1e2a34cb4.tar.bz2 uhd-107a49c0c236940da7d3bd0f57da4bc1e2a34cb4.zip | |
host: Update code base using clang-tidy
The checks from the new clang-tidy file are applied to the source tree
using:
$ find . -name "*.cpp" | sort -u | xargs \
--max-procs 8 --max-args 1 clang-tidy --format-style=file \
--fix -p /path/to/compile_commands.json
Diffstat (limited to 'host/lib/usrp/b200/b200_impl.cpp')
| -rw-r--r-- | host/lib/usrp/b200/b200_impl.cpp | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp index 7f250fd42..e43eff045 100644 --- a/host/lib/usrp/b200/b200_impl.cpp +++ b/host/lib/usrp/b200/b200_impl.cpp @@ -42,8 +42,8 @@ constexpr int64_t REENUMERATION_TIMEOUT_MS = 3000; class b200_ad9361_client_t : public ad9361_params { public: - ~b200_ad9361_client_t() {} - double get_band_edge(frequency_band_t band) + ~b200_ad9361_client_t() override {} + double get_band_edge(frequency_band_t band) override { switch (band) { case AD9361_RX_BAND0: @@ -56,15 +56,15 @@ public: return 0; } } - clocking_mode_t get_clocking_mode() + clocking_mode_t get_clocking_mode() override { return clocking_mode_t::AD9361_XTAL_N_CLK_PATH; } - digital_interface_mode_t get_digital_interface_mode() + digital_interface_mode_t get_digital_interface_mode() override { return AD9361_DDR_FDD_LVCMOS; } - digital_interface_delays_t get_digital_interface_timing() + digital_interface_delays_t get_digital_interface_timing() override { digital_interface_delays_t delays; delays.rx_clk_delay = 0; @@ -79,8 +79,8 @@ public: class b2xxmini_ad9361_client_t : public ad9361_params { public: - ~b2xxmini_ad9361_client_t() {} - double get_band_edge(frequency_band_t band) + ~b2xxmini_ad9361_client_t() override {} + double get_band_edge(frequency_band_t band) override { switch (band) { case AD9361_RX_BAND0: @@ -93,15 +93,15 @@ public: return 0; // On both Rx and Tx } } - clocking_mode_t get_clocking_mode() + clocking_mode_t get_clocking_mode() override { return clocking_mode_t::AD9361_XTAL_N_CLK_PATH; } - digital_interface_mode_t get_digital_interface_mode() + digital_interface_mode_t get_digital_interface_mode() override { return AD9361_DDR_FDD_LVCMOS; } - digital_interface_delays_t get_digital_interface_timing() + digital_interface_delays_t get_digital_interface_timing() override { digital_interface_delays_t delays; delays.rx_clk_delay = 0; |