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authorJosh Blum <josh@joshknows.com>2011-06-15 11:34:25 -0700
committerJosh Blum <josh@joshknows.com>2011-06-15 11:34:25 -0700
commit1bfb999b0a322ca6dae302c8808749bfb5f6fcb6 (patch)
treecec9343a7fe9319f459d9153ea5e7c62d9410f32 /host/lib/usrp/b100/clock_ctrl.hpp
parentff143516a8371aca85144887caabec91e5d8801e (diff)
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b100: removed usrp prefix from files
Diffstat (limited to 'host/lib/usrp/b100/clock_ctrl.hpp')
-rw-r--r--host/lib/usrp/b100/clock_ctrl.hpp118
1 files changed, 118 insertions, 0 deletions
diff --git a/host/lib/usrp/b100/clock_ctrl.hpp b/host/lib/usrp/b100/clock_ctrl.hpp
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+++ b/host/lib/usrp/b100/clock_ctrl.hpp
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+//
+// Copyright 2010 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+#ifndef INCLUDED_B100_CLOCK_CTRL_HPP
+#define INCLUDED_B100_CLOCK_CTRL_HPP
+
+#include "b100_iface.hpp"
+#include <boost/shared_ptr.hpp>
+#include <boost/utility.hpp>
+#include <vector>
+
+/*!
+ * The usrp-e clock control:
+ * - Setup system clocks.
+ * - Disable/enable clock lines.
+ */
+class b100_clock_ctrl : boost::noncopyable{
+public:
+ typedef boost::shared_ptr<b100_clock_ctrl> sptr;
+
+ /*!
+ * Make a new clock control object.
+ * \param iface the b100 iface object
+ * \param master_clock_rate the master FPGA/sample clock rate
+ * \return the clock control object
+ */
+ static sptr make(b100_iface::sptr iface, double master_clock_rate);
+
+ /*!
+ * Set the rate of the fpga clock line.
+ * Throws if rate is not valid.
+ * \param rate the new rate in Hz
+ */
+ virtual void set_fpga_clock_rate(double rate) = 0;
+
+ /*!
+ * Get the rate of the fpga clock line.
+ * \return the fpga clock rate in Hz
+ */
+ virtual double get_fpga_clock_rate(void) = 0;
+
+ /*!
+ * Get the possible rates of the rx dboard clock.
+ * \return a vector of clock rates in Hz
+ */
+ virtual std::vector<double> get_rx_dboard_clock_rates(void) = 0;
+
+ /*!
+ * Get the possible rates of the tx dboard clock.
+ * \return a vector of clock rates in Hz
+ */
+ virtual std::vector<double> get_tx_dboard_clock_rates(void) = 0;
+
+ /*!
+ * Set the rx dboard clock rate to a possible rate.
+ * \param rate the new clock rate in Hz
+ * \throw exception when rate cannot be achieved
+ */
+ virtual void set_rx_dboard_clock_rate(double rate) = 0;
+
+ /*!
+ * Set the tx dboard clock rate to a possible rate.
+ * \param rate the new clock rate in Hz
+ * \throw exception when rate cannot be achieved
+ */
+ virtual void set_tx_dboard_clock_rate(double rate) = 0;
+
+ /*!
+ * Enable/disable the FPGA clock.
+ * \param enb true to enable
+ */
+
+ virtual void enable_fpga_clock(bool enb) = 0;
+
+ /*!
+ * Enable/disable the rx dboard clock.
+ * \param enb true to enable
+ */
+ virtual void enable_rx_dboard_clock(bool enb) = 0;
+
+ /*!
+ * Enable/disable the tx dboard clock.
+ * \param enb true to enable
+ */
+ virtual void enable_tx_dboard_clock(bool enb) = 0;
+
+ /*!
+ * Use the internal TCXO reference
+ */
+ virtual void use_internal_ref(void) = 0;
+
+ /*!
+ * Use the external SMA reference
+ */
+ virtual void use_external_ref(void) = 0;
+
+ /*!
+ * Use external if available, internal otherwise
+ */
+ virtual void use_auto_ref(void) = 0;
+
+};
+
+#endif /* INCLUDED_B100_CLOCK_CTRL_HPP */