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| author | Ashish Chaudhari <ashish@ettus.com> | 2015-07-07 15:13:11 -0700 |
|---|---|---|
| committer | Ashish Chaudhari <ashish@ettus.com> | 2015-07-07 15:15:17 -0700 |
| commit | a44f791a44fc248f82da070cd6ea2405cf4532f6 (patch) | |
| tree | 07298e730432b16ae56de92d744faeb58bb2a85b /host/lib/transport | |
| parent | d48030e8b3fe8b4bf99f689d3412d1fccddd698b (diff) | |
| download | uhd-a44f791a44fc248f82da070cd6ea2405cf4532f6.tar.gz uhd-a44f791a44fc248f82da070cd6ea2405cf4532f6.tar.bz2 uhd-a44f791a44fc248f82da070cd6ea2405cf4532f6.zip | |
x300: Added FPGA->ADC Clock delay for rev 7+ boards
Diffstat (limited to 'host/lib/transport')
0 files changed, 0 insertions, 0 deletions