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author | michael-west <michael.west@ettus.com> | 2018-11-29 11:35:39 -0800 |
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committer | Brent Stapleton <bstapleton@g.hmc.edu> | 2018-12-10 19:14:18 -0800 |
commit | 575a676ec33a1f5e5103e4a800a84169fa0bf1dd (patch) | |
tree | dd78a2e25a5db3ccb6da94d51f252bc644c4abfb /host/lib/include/uhdlib | |
parent | 400642eda5acf68342529baa7cb3b66a072c7b97 (diff) | |
download | uhd-575a676ec33a1f5e5103e4a800a84169fa0bf1dd.tar.gz uhd-575a676ec33a1f5e5103e4a800a84169fa0bf1dd.tar.bz2 uhd-575a676ec33a1f5e5103e4a800a84169fa0bf1dd.zip |
TwinRX: Fix initialization
- Reordered initialization
- Fixed issue where LO2 initialization data was being written to LO1
- Moved SPI config to be a member variable so it is not constantly re-created
- Changed SPI clock divider from hard-coded value to a calculation based on CODEC rate
Diffstat (limited to 'host/lib/include/uhdlib')
0 files changed, 0 insertions, 0 deletions