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authorJosh Blum <josh@joshknows.com>2010-06-23 01:43:25 +0000
committerJosh Blum <josh@joshknows.com>2010-06-23 01:43:25 +0000
commit2ff1a854669a0fe5c8029f0c013e38faade6b826 (patch)
treef563530c90d20fbd29cb2caf81f3eca7016dd3bc /host/lib/ic_reg_maps/gen_ad9522_regs.py
parente6aed138b08100fe81355771fc62d4ff2f7556d0 (diff)
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usrp-e: clock control constants to easily change dividers and counters, tweaks to ic reg maps common
Diffstat (limited to 'host/lib/ic_reg_maps/gen_ad9522_regs.py')
-rwxr-xr-xhost/lib/ic_reg_maps/gen_ad9522_regs.py2
1 files changed, 2 insertions, 0 deletions
diff --git a/host/lib/ic_reg_maps/gen_ad9522_regs.py b/host/lib/ic_reg_maps/gen_ad9522_regs.py
index 9da51205b..ed6b5f48d 100755
--- a/host/lib/ic_reg_maps/gen_ad9522_regs.py
+++ b/host/lib/ic_reg_maps/gen_ad9522_regs.py
@@ -32,9 +32,11 @@ cp_mode 0x010[3:2] 3 high_imp, force
pll_power_down 0x010[1:0] 1 normal=0, async=1, sync=3
r_counter_lsb 0x011[7:0] 1
r_counter_msb 0x012[5:0] 0
+~r_counter r_counter_lsb, r_counter_msb
a_counter 0x013[5:0] 0
b_counter_lsb 0x014[7:0] 3
b_counter_msb 0x015[4:0] 0
+~b_counter b_counter_lsb, b_counter_msb
set_cp_pin_to_vcp_2 0x016[7] 0 normal, vcp_2
reset_r_counter 0x016[6] 0
reset_a_and_b_counters 0x016[5] 0