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| author | Wade Fife <wade.fife@ettus.com> | 2021-03-04 16:27:24 -0600 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2021-03-17 17:46:06 -0500 |
| commit | ada6a4e46770d22d528b2b6fbc2bdd71e5e3064d (patch) | |
| tree | 21ba4229fb195da6fc1da4907ec00aed85a07c6c /host/examples/rfnoc-example/fpga/Makefile.srcs | |
| parent | 866df135adb91299d1009c1b1d2053dd3112acda (diff) | |
| download | uhd-ada6a4e46770d22d528b2b6fbc2bdd71e5e3064d.tar.gz uhd-ada6a4e46770d22d528b2b6fbc2bdd71e5e3064d.tar.bz2 uhd-ada6a4e46770d22d528b2b6fbc2bdd71e5e3064d.zip | |
examples: Add IP to OOT RFNoC gain example
This updates the gain example to show how to use RFNoC IP, in-tree
Xilinx IP, and out-of-tree Xilinx IP in a custom RFNoC block.
Diffstat (limited to 'host/examples/rfnoc-example/fpga/Makefile.srcs')
| -rw-r--r-- | host/examples/rfnoc-example/fpga/Makefile.srcs | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/host/examples/rfnoc-example/fpga/Makefile.srcs b/host/examples/rfnoc-example/fpga/Makefile.srcs index f95dab6ea..88a729c97 100644 --- a/host/examples/rfnoc-example/fpga/Makefile.srcs +++ b/host/examples/rfnoc-example/fpga/Makefile.srcs @@ -6,16 +6,18 @@ # We first need to figure out our own path, in case this file is being included # from somewhere else (e.g., from a fpgadev/top/$device directory) -RFNOC_EXAMPLE_DIR := $(dir $(abspath $(lastword $(MAKEFILE_LIST)))) +OOT_FPGA_DIR := $(dir $(abspath $(lastword $(MAKEFILE_LIST)))) # One include statement for every RFNoC block with its own subdirectory, which # itself will contain a Makefile.srcs -include $(RFNOC_EXAMPLE_DIR)/rfnoc_block_gain/Makefile.srcs +include $(OOT_FPGA_DIR)/rfnoc_block_gain/Makefile.srcs + +include $(OOT_FPGA_DIR)/ip/cmplx_mul/Makefile.inc +LIB_IP_XCI_SRCS += $(LIB_IP_CMPLX_MUL_SRCS) # If there are additional modules or IP (other than what is in the RFNoC block # subdirectories) that needs to get installed in order to synthesize blocks from # this module, list them here: -#RFNOC_OOT_SRCS += $(abspath $(addprefix ${RFNOC_EXAMPLE_DIR}, -#my_other_module.v \ -#ip/my_ip_core/my_ip_core.xci \ +#RFNOC_OOT_SRCS += $(abspath $(addprefix ${OOT_FPGA_DIR}, \ +#$(IP_BUILD_DIR)/cmplx_mul/cmplx_mul.xci \ #)) |