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| author | Jonathon Pendlum <jonathon.pendlum@ettus.com> | 2017-03-01 14:13:12 -0800 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-03-01 14:14:36 -0800 |
| commit | 5ca309a86e8d99f3431bfd0116579e7d57bf64a7 (patch) | |
| tree | 0bbcf66d5fc78f0ab2b3fac80e87b64405988128 /host/docs/general.dox | |
| parent | 888e224e40ec3ed7a55cd845ec4c06fcac11bbe2 (diff) | |
| download | uhd-5ca309a86e8d99f3431bfd0116579e7d57bf64a7.tar.gz uhd-5ca309a86e8d99f3431bfd0116579e7d57bf64a7.tar.bz2 uhd-5ca309a86e8d99f3431bfd0116579e7d57bf64a7.zip | |
docs: Added FPGA functional verification procedures
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