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author | Josh Blum <josh@joshknows.com> | 2010-08-04 12:10:23 -0700 |
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committer | Jason Abele <jason@ettus.com> | 2010-08-04 18:50:37 -0700 |
commit | 9b7d4b4394e3405a447932eb1aaa646f70c7b59d (patch) | |
tree | e373809bf2623f6fb998730a08e051d675a04d12 /host/docs/dboards.rst | |
parent | ce5940f86e896b639e8fe60e2901a9d59f739785 (diff) | |
download | uhd-9b7d4b4394e3405a447932eb1aaa646f70c7b59d.tar.gz uhd-9b7d4b4394e3405a447932eb1aaa646f70c7b59d.tar.bz2 uhd-9b7d4b4394e3405a447932eb1aaa646f70c7b59d.zip |
dbsrx: modification docs
Diffstat (limited to 'host/docs/dboards.rst')
-rw-r--r-- | host/docs/dboards.rst | 43 |
1 files changed, 42 insertions, 1 deletions
diff --git a/host/docs/dboards.rst b/host/docs/dboards.rst index 8e6ecc4ae..b66fd2069 100644 --- a/host/docs/dboards.rst +++ b/host/docs/dboards.rst @@ -32,7 +32,7 @@ The Basic TX and LFTX boards have 1 quadrature subdevice using both antennas. The boards have no tunable elements or programmable gains. Though the magic of aliasing, you can up-convert signals -greater than the nyquist rate of the DAC. +greater than the Nyquist rate of the DAC. ^^^^^^^^^^^^^^^^^^^^^^^^^^^ DBSRX @@ -100,3 +100,44 @@ the receive antenna will always be set to RX2, regardless of the settings. Transmit Gains: **PGA0**, Range: 0-25dB Recieve Gains: **PGA0**, Range: 0-31.5dB + +------------------------------------------------------------------------ +Daughterboard Modifications +------------------------------------------------------------------------ + +Sometimes, daughterboards will require modification +to work on certain frequencies or to work with certain hardware. +Modification usually involves moving/removing a SMT component +and burning a new daughterboard id into the eeprom. + +^^^^^^^^^^^^^^^^^^^^^^^^^^^ +DBSRX +^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Due to different clocking capabilities, +the DBSRX will require modifications to operate on a non-USRP1 motherboard. +On a USRP1 motherboard, a divided clock is provided from an FPGA pin +because the standard daughterboard clock lines cannot provided a divided clock. +However, on other USRP motherboards, the divided clock is provided +over the standard daughterboard clock lines. + +**Step 1: Move the clock configuration resistor** + +Remove R193 (which is 10 ohms, 0603 size) and put it on R194, which is empty. +This is made somewhat more complicated by the fact that the silkscreen is not clear in that area. +R193 is on the back, immediately below the large beige connector, J2. +R194 is just below, and to the left of R193. +The silkscreen for R193 is ok, but for R194, +it is upside down, and partially cut off. +If you lose R193, you can use anything from 0 to 10 ohms there. + +**Step 2: Burn a new daughterboard id into the EEPROM** + +With the daughterboard plugged-in, run the following commands: +:: + + cd <prefix>/share/uhd/utils + ./usrp_burn_db_eeprom --id=0x000d --unit=RX --args=<args> --db=<db> + +* <args> are device address arguments (optional if only one USRP is on your machine) +* <db> is the name of the daughterboard slot (optional if the USRP has only one slot) |