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authorroot <root@usrp1-e.(none)>2010-03-23 13:38:46 +0000
committerroot <root@usrp1-e.(none)>2010-03-23 13:38:46 +0000
commit3137e2ca001176c4ffc12e091530fe23c82974b6 (patch)
tree418b1d2cecb2a8ccb0fad89140e13a9d44851196 /host/apps/omap_debug/usrp1_e.h
parentc329da8f953c3981e23791c688f350b27541554a (diff)
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Commit random test code.
Unfiltered commit of test code I am accumlating on my ewewoneee. Most of this should go away before release.
Diffstat (limited to 'host/apps/omap_debug/usrp1_e.h')
-rw-r--r--host/apps/omap_debug/usrp1_e.h56
1 files changed, 56 insertions, 0 deletions
diff --git a/host/apps/omap_debug/usrp1_e.h b/host/apps/omap_debug/usrp1_e.h
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index 000000000..b49b526dc
--- /dev/null
+++ b/host/apps/omap_debug/usrp1_e.h
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2010 Ettus Research, LLC
+ *
+ * Written by Philip Balister <philip@opensdr.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __USRP_E_H
+#define __USRP_E_H
+
+#include <linux/types.h>
+#include <linux/ioctl.h>
+
+struct usrp1_e_ctl {
+ __u32 offset;
+ __u32 count;
+ __u16 buf[];
+};
+
+// SPI interface
+
+#define UE_SPI_TXONLY 0
+#define UE_SPI_TXRX 1
+
+// Defines for spi ctrl register
+#define UE_SPI_CTRL_ASS (1<<13)
+#define UE_SPI_CTRL_IE (1<<12)
+#define UE_SPI_CTRL_LSB (1<<11)
+#define UE_SPI_CTRL_TXNEG (1<<10)
+#define UE_SPI_CTRL_RXNEG (1<<9)
+#define UE_SPI_CTRL_GO_BSY (1<<8)
+#define UE_SPI_CTRL_CHAR_LEN_MASK 0x7f
+
+#define UE_SPI_PUSH_RISE 0
+#define UE_SPI_PUSH_FALL UE_SPI_CTRL_TXNEG
+#define UE_SPI_LATCH_RISE 0
+#define UE_SPI_LATCH_FALL UE_SPI_CTRL_RXNEG
+
+struct usrp_e_spi {
+ __u8 readback;
+ __u32 slave;
+ __u32 data;
+ __u32 length;
+ __u32 flags;
+};
+
+#define USRP_E_IOC_MAGIC 'u'
+#define USRP_E_WRITE_CTL _IOW(USRP_E_IOC_MAGIC, 0x20, struct usrp1_e_ctl)
+#define USRP_E_READ_CTL _IOWR(USRP_E_IOC_MAGIC, 0x21, struct usrp1_e_ctl)
+#define USRP_E_SPI _IOW(USRP_E_IOC_MAGIC, 0x22, struct usrp_e_spi)
+
+#endif