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authorJosh Blum <josh@joshknows.com>2010-11-23 15:35:48 -0800
committerJosh Blum <josh@joshknows.com>2010-11-23 15:35:48 -0800
commitf56c1247cbe7b7e90acee2711b5dda3356b9486a (patch)
tree81dadc83537c2c50550cd94e224571e472176c6f /host/apps/omap_debug/set_debug_pins.py
parent9f94ef843ceca63bcb83b2d473cbba709c9110b6 (diff)
parenteb26e8adb4a5718ee3db3bb7f32c0cd31d060af9 (diff)
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Merge branch 'next' of ettus.sourcerepo.com:ettus/uhdpriv into next
Diffstat (limited to 'host/apps/omap_debug/set_debug_pins.py')
-rwxr-xr-xhost/apps/omap_debug/set_debug_pins.py35
1 files changed, 35 insertions, 0 deletions
diff --git a/host/apps/omap_debug/set_debug_pins.py b/host/apps/omap_debug/set_debug_pins.py
new file mode 100755
index 000000000..0f9ecd7b9
--- /dev/null
+++ b/host/apps/omap_debug/set_debug_pins.py
@@ -0,0 +1,35 @@
+#!/usr/bin/python
+
+import os
+
+# Memory Map
+misc_base = 0
+uart_base = 1
+spi_base = 2
+i2c_base = 3
+gpio_base = 4 * 128
+settings_base = 5
+
+# GPIO offset
+gpio_pins = 0
+gpio_ddr = 4
+gpio_ctrl_lo = 8
+gpio_ctrl_hi = 12
+
+def set_reg(reg, val):
+ os.system("./usrp1-e-ctl w %d 1 %d" % (reg,val))
+
+def get_reg(reg):
+ fin,fout = os.popen4("./usrp1-e-ctl r %d 1" % (reg,))
+ print fout.read()
+
+# Set DDRs to output
+set_reg(gpio_base+gpio_ddr, 0xFFFF)
+set_reg(gpio_base+gpio_ddr+2, 0xFFFF)
+
+# Set CTRL to Debug #0 ( A is for debug 0, F is for debug 1 )
+set_reg(gpio_base+gpio_ctrl_lo, 0xAAAA)
+set_reg(gpio_base+gpio_ctrl_lo+2, 0xAAAA)
+set_reg(gpio_base+gpio_ctrl_hi, 0xAAAA)
+set_reg(gpio_base+gpio_ctrl_hi+2, 0xAAAA)
+