fpga: Change RFNoC YAML version numbers to strings

Change version from a numeric to a string, in order to
differentiate between versions like "1.1" and "1.10".

10 files changed, 20 insertions, 20 deletions

diff --git a/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml b/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml
index aa464454e..f23dfa152 100644
--- a/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'e310'
 default_target: 'E310_SG3'
diff --git a/fpga/usrp3/top/e320/e320_rfnoc_image_core.yml b/fpga/usrp3/top/e320/e320_rfnoc_image_core.yml
index 57234c19b..44fe551ba 100644
--- a/fpga/usrp3/top/e320/e320_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/e320/e320_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'e320'
 default_target: 'E320_1G'
diff --git a/fpga/usrp3/top/n3xx/n300_bist_image_core.yml b/fpga/usrp3/top/n3xx/n300_bist_image_core.yml
index 446c0ae6b..0e9d97f55 100644
--- a/fpga/usrp3/top/n3xx/n300_bist_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n300_bist_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'n300'
 default_target: 'N300_AA'
diff --git a/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml b/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml
index 3b28fcd14..1574204f2 100644
--- a/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n300_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'n300'
 default_target: 'N300_HG'
diff --git a/fpga/usrp3/top/n3xx/n310_bist_image_core.yml b/fpga/usrp3/top/n3xx/n310_bist_image_core.yml
index cb4331b15..ea228372e 100644
--- a/fpga/usrp3/top/n3xx/n310_bist_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n310_bist_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bitwidth of the CHDR bus for this block
 device: 'n310'
 default_target: 'N310_AA'
diff --git a/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml b/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml
index abef58afc..4826d28b6 100644
--- a/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n310_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'n310'
 default_target: 'N310_HG'
diff --git a/fpga/usrp3/top/n3xx/n320_bist_image_core.yml b/fpga/usrp3/top/n3xx/n320_bist_image_core.yml
index bc9fb18a1..adf27b34e 100644
--- a/fpga/usrp3/top/n3xx/n320_bist_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n320_bist_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bitwidth of the CHDR bus for this block
 device: 'n320'
 default_target: 'N320_AA'
diff --git a/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml b/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml
index ecddcc3d0..ce0e9389a 100644
--- a/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/n3xx/n320_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'n320'
 default_target: 'N320_HG'
diff --git a/fpga/usrp3/top/x300/x300_rfnoc_image_core.yml b/fpga/usrp3/top/x300/x300_rfnoc_image_core.yml
index d9570b8ef..b7e0affe3 100644
--- a/fpga/usrp3/top/x300/x300_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/x300/x300_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'x300'
 default_target: 'X300_HG'
diff --git a/fpga/usrp3/top/x300/x310_rfnoc_image_core.yml b/fpga/usrp3/top/x300/x310_rfnoc_image_core.yml
index 84b5f0234..bfa050803 100644
--- a/fpga/usrp3/top/x300/x310_rfnoc_image_core.yml
+++ b/fpga/usrp3/top/x300/x310_rfnoc_image_core.yml
@@ -3,8 +3,8 @@
 schema: rfnoc_imagebuilder_args         # Identifier for the schema used to validate this file
 copyright: 'Ettus Research, A National Instruments Brand' # Copyright information used in file headers
 license: 'SPDX-License-Identifier: LGPL-3.0-or-later' # License information used in file headers
-version: 1.0                            # File version
-rfnoc_version: 1.0                      # RFNoC protocol version
+version: '1.0'                          # File version
+rfnoc_version: '1.0'                    # RFNoC protocol version
 chdr_width: 64                          # Bit width of the CHDR bus for this image
 device: 'x310'
 default_target: 'X310_HG'