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| author | Wade Fife <wade.fife@ettus.com> | 2021-06-08 19:40:46 -0500 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2021-06-10 11:56:58 -0500 |
| commit | 6d3765605262016a80f71e36357f749ea35cbe5a (patch) | |
| tree | 7d62d6622befd4132ac1ee085effa1426f7f53e5 /fpga/usrp3/top/x400/ip/dac_100m_bd/Makefile.inc | |
| parent | f706b89e6974e28ce76aadeeb06169becc86acba (diff) | |
| download | uhd-6d3765605262016a80f71e36357f749ea35cbe5a.tar.gz uhd-6d3765605262016a80f71e36357f749ea35cbe5a.tar.bz2 uhd-6d3765605262016a80f71e36357f749ea35cbe5a.zip | |
fpga: x400: Add support for X410 motherboard FPGA
Co-authored-by: Andrew Moch <Andrew.Moch@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com>
Co-authored-by: Joerg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Kumaran Subramoniam <kumaran.subramoniam@ni.com>
Co-authored-by: Max Köhler <max.koehler@ni.com>
Co-authored-by: Michael Auchter <michael.auchter@ni.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>
Co-authored-by: Hector Rubio <hrubio@ni.com>
Diffstat (limited to 'fpga/usrp3/top/x400/ip/dac_100m_bd/Makefile.inc')
| -rw-r--r-- | fpga/usrp3/top/x400/ip/dac_100m_bd/Makefile.inc | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/fpga/usrp3/top/x400/ip/dac_100m_bd/Makefile.inc b/fpga/usrp3/top/x400/ip/dac_100m_bd/Makefile.inc new file mode 100644 index 000000000..c107580be --- /dev/null +++ b/fpga/usrp3/top/x400/ip/dac_100m_bd/Makefile.inc @@ -0,0 +1,36 @@ +# +# Copyright 2021 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: LGPL-3.0-or-later +# + +include $(TOOLS_DIR)/make/viv_ip_builder.mak + +IP_DAC_100M_ORIG_SRCS = $(addprefix $(IP_DIR)/dac_100m_bd/, \ +dac_100m_bd.tcl \ +) + +IP_DAC_100M_HDL_SRCS = $(addprefix $(BASE_DIR)/x400/rf/100m/, \ +duc_saturate.vhd \ +dac_1_3_clk_converter.vhd \ +dac_2_1_clk_converter.vhd \ +) + +IP_DAC_100M_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/dac_100m_bd/, \ +dac_100m_bd.tcl \ +) + +IP_DAC_100M_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/dac_100m_bd/, \ +dac_100m_bd/dac_100m_bd.bd \ +) + +BD_DAC_100M_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/dac_100m_bd/, \ +dac_100m_bd.bd.out \ +dac_100m_bd/dac_100m_bd_ooc.xdc \ +dac_100m_bd/synth/dac_100m_bd.v \ +) + +EMPTY_IP_SRCS = + +$(IP_DAC_100M_BD_SRCS) $(BD_DAC_100M_BD_OUTS) $(IP_DAC_100M_BDTCL_SRCS): $(IP_DAC_100M_ORIG_SRCS) + $(call BUILD_VIVADO_BDTCL,dac_100m_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(EMPTY_IP_SRCS),$(IP_DAC_100M_HDL_SRCS),) |