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| author | Javier Valenzuela <javier.valenzuela@ni.com> | 2022-03-02 13:44:35 -0600 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2022-03-04 09:41:24 -0600 |
| commit | 1d7d1226e7576bfad484109afd3aad4e78af111b (patch) | |
| tree | fa80590c2550029cbd2f82fb12c662b0be1df263 /fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm | |
| parent | adb352a2ad81d7c6d70ec5880a787b6bab7d19ba (diff) | |
| download | uhd-1d7d1226e7576bfad484109afd3aad4e78af111b.tar.gz uhd-1d7d1226e7576bfad484109afd3aad4e78af111b.tar.bz2 uhd-1d7d1226e7576bfad484109afd3aad4e78af111b.zip | |
fpga: x400: Add SPI Controller Info register
Include a register that contains SPI controller information.
Currently, it only provides the number of slaves addressable
by the SPI engine.
Diffstat (limited to 'fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm')
| -rw-r--r-- | fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm b/fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm index 0a101710e..d53fc9e3b 100644 --- a/fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm +++ b/fpga/usrp3/top/x400/doc/X4XX_FPGA_left.htm @@ -281,7 +281,8 @@ <p><span class="register" id="a_DIG_IFC_REGMAP|SPI_SLAVE_CONFIG" onclick="a('DIG_IFC_REGMAP|SPI_SLAVE_CONFIG');">SPI_SLAVE_CONFIG</span></p> <p><span class="register" id="a_DIG_IFC_REGMAP|SPI_TRANSACTION_CONFIG" onclick="a('DIG_IFC_REGMAP|SPI_TRANSACTION_CONFIG');">SPI_TRANSACTION_CONFIG</span></p> <p><span class="register" id="a_DIG_IFC_REGMAP|SPI_TRANSACTION_GO" onclick="a('DIG_IFC_REGMAP|SPI_TRANSACTION_GO');">SPI_TRANSACTION_GO</span></p> - <p><span class="register" id="a_DIG_IFC_REGMAP|SPI_STATUS" onclick="a('DIG_IFC_REGMAP|SPI_STATUS');">SPI_STATUS</span></p> + <p><span class="register" id="a_DIG_IFC_REGMAP|SPI_STATUS" onclick="a('DIG_IFC_REGMAP|SPI_STATUS');">SPI_STATUS</span></p> + <p><span class="register" id="a_DIG_IFC_REGMAP|CONTROLLER_INFO" onclick="a('DIG_IFC_REGMAP|CONTROLLER_INFO');">CONTROLLER_INFO</span></p> </div> </div> <p> |