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| author | Humberto Jimenez <humberto.jimenez@ni.com> | 2021-10-27 14:54:46 -0500 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2021-12-01 10:51:07 -0600 |
| commit | e1ce4565dbc7336ee806adce7c087bda4fcc77ae (patch) | |
| tree | 4e3c05beb4b3b5458869034a70028f97fd2b4071 /fpga/usrp3/top/x400/cpld/regmap/reconfig_regmap_utils.vh | |
| parent | 37feec8992afaffbea19428a029093ae7f6453e3 (diff) | |
| download | uhd-e1ce4565dbc7336ee806adce7c087bda4fcc77ae.tar.gz uhd-e1ce4565dbc7336ee806adce7c087bda4fcc77ae.tar.bz2 uhd-e1ce4565dbc7336ee806adce7c087bda4fcc77ae.zip | |
fpga: x400: Refactor CPLDs build process
This commit refactors the X410's CPLDs build process to make it similar to other
FPGA targets within the repo. The new process relies on basic Quartus build
utilities.
Additionally, this commit adds support for an alternative MAX10 CPLD for the
motherboard CPLD implementation. Both previous (10M04) and new variant
(10M08) are supported concurrently. The images package mapping is updated to
reflect these changes.
Diffstat (limited to 'fpga/usrp3/top/x400/cpld/regmap/reconfig_regmap_utils.vh')
| -rw-r--r-- | fpga/usrp3/top/x400/cpld/regmap/reconfig_regmap_utils.vh | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/fpga/usrp3/top/x400/cpld/regmap/reconfig_regmap_utils.vh b/fpga/usrp3/top/x400/cpld/regmap/reconfig_regmap_utils.vh index 2ddc6a8b9..f1f4e9142 100644 --- a/fpga/usrp3/top/x400/cpld/regmap/reconfig_regmap_utils.vh +++ b/fpga/usrp3/top/x400/cpld/regmap/reconfig_regmap_utils.vh @@ -28,10 +28,13 @@ //=============================================================================== // Enumerated type FLASH_PRIMARY_IMAGE_ADDR_ENUM - localparam FLASH_PRIMARY_IMAGE_ADDR_ENUM_SIZE = 3; - localparam FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT = 'h1000; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT - localparam FLASH_PRIMARY_IMAGE_START_ADDR = 'h9C00; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_START_ADDR - localparam FLASH_PRIMARY_IMAGE_END_ADDR = 'h127FF; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_END_ADDR + localparam FLASH_PRIMARY_IMAGE_ADDR_ENUM_SIZE = 6; + localparam FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04 = 'h1000; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04 + localparam FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M08 = 'h2000; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M08 + localparam FLASH_PRIMARY_IMAGE_START_ADDR_10M04 = 'h9C00; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_START_ADDR_10M04 + localparam FLASH_PRIMARY_IMAGE_START_ADDR_10M08 = 'hAC00; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_START_ADDR_10M08 + localparam FLASH_PRIMARY_IMAGE_END_ADDR_10M04 = 'h127FF; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_END_ADDR_10M04 + localparam FLASH_PRIMARY_IMAGE_END_ADDR_10M08 = 'h137FF; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_END_ADDR_10M08 // FLASH_STATUS_REG Register (from reconfig_engine.v) localparam FLASH_STATUS_REG = 'h0; // Register Offset |