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author | Javier Valenzuela <javier.valenzuela@ni.com> | 2022-06-14 10:12:05 -0500 |
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committer | skooNI <60897865+skooNI@users.noreply.github.com> | 2022-07-20 15:57:20 -0500 |
commit | 303ddf1238ef1d38fb8b25f7e97b2319475299c1 (patch) | |
tree | ee9aba5aca59ee20dc7b618ab41c4cc7ba18ba40 /fpga/usrp3/top/x400/cpld/reconfig_engine.v | |
parent | 32786c63930bc532bca1f25ab8d3404b5773edfd (diff) | |
download | uhd-303ddf1238ef1d38fb8b25f7e97b2319475299c1.tar.gz uhd-303ddf1238ef1d38fb8b25f7e97b2319475299c1.tar.bz2 uhd-303ddf1238ef1d38fb8b25f7e97b2319475299c1.zip |
fpga: x400: zbx: Add support for XO3 CPLD variant.
The main changes included are:
- Variant-dependent pin-out instantiation.
- Update clocking scheme in top level file
to include XO3 PLL
- Add ability to shift outgoing data for
the GPIO communication interface with
the X410 FPGA.
- Include project files required to build
the XO3 variant of the ZBX CPLD.
- Add build flow for Lattice Diamond designs.
- Add ability to build XO3 variant of ZBX CPLD.
Diffstat (limited to 'fpga/usrp3/top/x400/cpld/reconfig_engine.v')
-rw-r--r-- | fpga/usrp3/top/x400/cpld/reconfig_engine.v | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/fpga/usrp3/top/x400/cpld/reconfig_engine.v b/fpga/usrp3/top/x400/cpld/reconfig_engine.v index fc6a4837e..6674cc693 100644 --- a/fpga/usrp3/top/x400/cpld/reconfig_engine.v +++ b/fpga/usrp3/top/x400/cpld/reconfig_engine.v @@ -73,7 +73,7 @@ module reconfig_engine #( `include "regmap/reconfig_regmap_utils.vh" `include "../../../lib/rfnoc/core/ctrlport.vh" - // Check MAX10 variant target (10M04 or 10M08) + // Check MAX10 variant target (10M04, 10M08 or XO3) `ifdef VARIANT_10M04 localparam FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT = FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04; localparam FLASH_PRIMARY_IMAGE_START_ADDR = FLASH_PRIMARY_IMAGE_START_ADDR_10M04; @@ -86,6 +86,13 @@ module reconfig_engine #( localparam FLASH_PRIMARY_IMAGE_END_ADDR = FLASH_PRIMARY_IMAGE_END_ADDR_10M08; localparam CFM0_WP_OFFSET_MSB = 27; // From Max 10 Flash Memory User Guide. localparam CFM0_WP_OFFSET_LSB = 25; // From Max 10 Flash Memory User Guide. + // The reconfiguration engine via flash is not supported in the XO3 variant. + `elsif VARIANT_XO3 + localparam FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT = 0; + localparam FLASH_PRIMARY_IMAGE_START_ADDR = 0; + localparam FLASH_PRIMARY_IMAGE_END_ADDR = 0; + localparam CFM0_WP_OFFSET_MSB = 0; + localparam CFM0_WP_OFFSET_LSB = 0; `else ERROR_MAX10_variant_must_be_defined(); localparam FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT = FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04; |