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| author | Humberto Jimenez <humberto.jimenez@ni.com> | 2021-10-27 14:54:46 -0500 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2021-12-01 10:51:07 -0600 |
| commit | e1ce4565dbc7336ee806adce7c087bda4fcc77ae (patch) | |
| tree | 4e3c05beb4b3b5458869034a70028f97fd2b4071 /fpga/usrp3/top/x400/cpld/mb_cpld.v | |
| parent | 37feec8992afaffbea19428a029093ae7f6453e3 (diff) | |
| download | uhd-e1ce4565dbc7336ee806adce7c087bda4fcc77ae.tar.gz uhd-e1ce4565dbc7336ee806adce7c087bda4fcc77ae.tar.bz2 uhd-e1ce4565dbc7336ee806adce7c087bda4fcc77ae.zip | |
fpga: x400: Refactor CPLDs build process
This commit refactors the X410's CPLDs build process to make it similar to other
FPGA targets within the repo. The new process relies on basic Quartus build
utilities.
Additionally, this commit adds support for an alternative MAX10 CPLD for the
motherboard CPLD implementation. Both previous (10M04) and new variant
(10M08) are supported concurrently. The images package mapping is updated to
reflect these changes.
Diffstat (limited to 'fpga/usrp3/top/x400/cpld/mb_cpld.v')
| -rw-r--r-- | fpga/usrp3/top/x400/cpld/mb_cpld.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp3/top/x400/cpld/mb_cpld.v b/fpga/usrp3/top/x400/cpld/mb_cpld.v index 4ea5dc574..2e709acd9 100644 --- a/fpga/usrp3/top/x400/cpld/mb_cpld.v +++ b/fpga/usrp3/top/x400/cpld/mb_cpld.v @@ -1025,7 +1025,7 @@ endmodule // </info> // <value name="PS_CPLD_SIGNATURE" integer="0x0A522D27"/> // <value name="PL_CPLD_SIGNATURE" integer="0x3FDC5C47"/> -// <value name="CPLD_REVISION" integer="0x21012015"/> +// <value name="CPLD_REVISION" integer="0x21111614"/> // <value name="OLDEST_CPLD_REVISION" integer="0x20122114"/> // </enumeratedtype> // </group> |