Merge FPGA repository back into UHD repository

The FPGA codebase was removed from the UHD repository in 2014 to reduce
the size of the repository. However, over the last half-decade, the
split between the repositories has proven more burdensome than it has
been helpful. By merging the FPGA code back, it will be possible to
create atomic commits that touch both FPGA and UHD codebases. Continuous
integration testing is also simplified by merging the repositories,
because it was previously difficult to automatically derive the correct
UHD branch when testing a feature branch on the FPGA repository.

This commit also updates the license files and paths therein.

We are therefore merging the repositories again. Future development for
FPGA code will happen in the same repository as the UHD host code and
MPM code.

== Original Codebase and Rebasing ==

The original FPGA repository will be hosted for the foreseeable future
at its original local location: https://github.com/EttusResearch/fpga/

It can be used for bisecting, reference, and a more detailed history.

The final commit from said repository to be merged here is
05003794e2da61cabf64dd278c45685a7abad7ec. This commit is tagged as
v4.0.0.0-pre-uhd-merge.

If you have changes in the FPGA repository that you want to rebase onto
the UHD repository, simply run the following commands:

- Create a directory to store patches (this should be an empty
  directory):

    mkdir ~/patches

- Now make sure that your FPGA codebase is based on the same state as
  the code that was merged:

    cd src/fpga # Or wherever your FPGA code is stored
    git rebase v4.0.0.0-pre-uhd-merge

  Note: The rebase command may look slightly different depending on what
  exactly you're trying to rebase.

- Create a patch set for your changes versus v4.0.0.0-pre-uhd-merge:

    git format-patch v4.0.0.0-pre-uhd-merge -o ~/patches

  Note: Make sure that only patches are stored in your output directory.
  It should otherwise be empty. Make sure that you picked the correct
  range of commits, and only commits you wanted to rebase were exported
  as patch files.

- Go to the UHD repository and apply the patches:

    cd src/uhd # Or wherever your UHD repository is stored
    git am --directory fpga ~/patches/*
    rm -rf ~/patches # This is for cleanup

== Contributors ==

The following people have contributed mainly to these files (this list
is not complete):

Co-authored-by: Alex Williams <alex.williams@ni.com>
Co-authored-by: Andrej Rode <andrej.rode@ettus.com>
Co-authored-by: Ashish Chaudhari <ashish@ettus.com>
Co-authored-by: Ben Hilburn <ben.hilburn@ettus.com>
Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Derek Kozel <derek.kozel@ettus.com>
Co-authored-by: EJ Kreinar <ej@he360.com>
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Ian Buckley <ian.buckley@gmail.com>
Co-authored-by: Jörg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Jon Kiser <jon.kiser@ni.com>
Co-authored-by: Josh Blum <josh@joshknows.com>
Co-authored-by: Jonathon Pendlum <jonathan.pendlum@ettus.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Matt Ettus <matt@ettus.com>
Co-authored-by: Michael West <michael.west@ettus.com>
Co-authored-by: Moritz Fischer <moritz.fischer@ettus.com>
Co-authored-by: Nick Foster <nick@ettus.com>
Co-authored-by: Nicolas Cuervo <nicolas.cuervo@ettus.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Paul David <paul.david@ettus.com>
Co-authored-by: Ryan Marlow <ryan.marlow@ettus.com>
Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com>
Co-authored-by: Sylvain Munaut <tnt@246tNt.com>
Co-authored-by: Trung Tran <trung.tran@ettus.com>
Co-authored-by: Vidush Vishwanath <vidush.vishwanath@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>

1 files changed, 106 insertions, 0 deletions

diff --git a/fpga/usrp3/top/x300/nirio_chdr64_adapter.v b/fpga/usrp3/top/x300/nirio_chdr64_adapter.v
new file mode 100644
index 000000000..05976105b
--- /dev/null
+++ b/fpga/usrp3/top/x300/nirio_chdr64_adapter.v
@@ -0,0 +1,106 @@
+//
+// Copyright 2019 Ettus Research, A National Instruments Brand
+//
+// SPDX-License-Identifier: LGPL-3.0-or-later
+//
+// Module: nirio_chdr64_adapter
+//
+// Description: A transport adapter specific to connecting an NI-RIO streaming
+//   interface to CHDR. It assumes to be connected to x300_pcie_int.
+//   See also chdr_xport_adapter_generic.
+//
+//   The tuser inputs/outputs used for routing are the index of the DMA channel.
+//   Because we have 6 DMA channels on NI-RIO on the X300, these are always 3
+//   bits wide.
+//
+// Parameters:
+//   - PROTOVER: RFNoC protocol version {8'd<major>, 8'd<minor>}
+//   - MTU: Log2 of the MTU of the packet in 64-bit words
+//   - RT_TBL_SIZE: Log2 of the depth of the return-address routing table
+//   - NODE_INST: The node type to return for a node-info discovery
+//
+// Signals:
+//   - device_id : The ID of the device that has instantiated this module
+//   - s_dma_*: The input Ethernet stream from the MAC (plus tuser for source DMA engine ID)
+//   - m_dma_*: The output Ethernet stream to the MAC (plus tuser for dest DMA engine ID)
+//   - s_chdr_*: The input CHDR stream from the rfnoc infrastructure
+//   - m_chdr_*: The output CHDR stream to the rfnoc infrastructure
+//
+
+module nirio_chdr64_adapter #(
+  parameter [15:0] PROTOVER         = {8'd1, 8'd0},
+  parameter        MTU              = 10,
+  parameter        RT_TBL_SIZE      = 6,
+  parameter        NODE_INST        = 0,
+  parameter        DMA_ID_WIDTH     = 3
+)(
+  // Clocking and reset interface
+  input  wire        clk,
+  input  wire        rst,
+  // Device info
+  input  wire [15:0] device_id,
+  // AXI-Stream interface to/from DMA engines
+  input  wire [63:0]              s_dma_tdata,
+  input  wire [DMA_ID_WIDTH-1:0]  s_dma_tuser,
+  input  wire                     s_dma_tlast,
+  input  wire                     s_dma_tvalid,
+  output wire                     s_dma_tready,
+  output wire [63:0]              m_dma_tdata,
+  output wire [DMA_ID_WIDTH-1:0]  m_dma_tuser,
+  output wire                     m_dma_tlast,
+  output wire                     m_dma_tvalid,
+  input  wire                     m_dma_tready,
+  // AXI-Stream interface to/from CHDR infrastructure
+  input  wire [63:0] s_chdr_tdata,
+  input  wire        s_chdr_tlast,
+  input  wire        s_chdr_tvalid,
+  output wire        s_chdr_tready,
+  output wire [63:0] m_chdr_tdata,
+  output wire        m_chdr_tlast,
+  output wire        m_chdr_tvalid,
+  input  wire        m_chdr_tready
+);
+
+  `include "../../lib/rfnoc/core/rfnoc_chdr_utils.vh"
+  `include "../../lib/rfnoc/core/rfnoc_chdr_internal_utils.vh"
+  `include "../../lib/rfnoc/xport/rfnoc_xport_types.vh"
+
+  //---------------------------------------
+  // CHDR Transport Adapter
+  //---------------------------------------
+
+  chdr_xport_adapter_generic #(
+    .PROTOVER(PROTOVER), .CHDR_W(64),
+    .USER_W(DMA_ID_WIDTH), .TBL_SIZE(RT_TBL_SIZE),
+    .NODE_SUBTYPE(NODE_SUBTYPE_XPORT_NIRIO_CHDR64), .NODE_INST(NODE_INST)
+  ) xport_adapter_gen_i (
+    .clk                (clk),
+    .rst                (rst),
+    .device_id          (device_id),
+    .s_axis_xport_tdata (s_dma_tdata),
+    .s_axis_xport_tuser (s_dma_tuser),
+    .s_axis_xport_tlast (s_dma_tlast),
+    .s_axis_xport_tvalid(s_dma_tvalid),
+    .s_axis_xport_tready(s_dma_tready),
+    .m_axis_xport_tdata (m_dma_tdata),
+    .m_axis_xport_tuser (m_dma_tuser),
+    .m_axis_xport_tlast (m_dma_tlast),
+    .m_axis_xport_tvalid(m_dma_tvalid),
+    .m_axis_xport_tready(m_dma_tready),
+    .s_axis_rfnoc_tdata (s_chdr_tdata),
+    .s_axis_rfnoc_tlast (s_chdr_tlast),
+    .s_axis_rfnoc_tvalid(s_chdr_tvalid),
+    .s_axis_rfnoc_tready(s_chdr_tready),
+    .m_axis_rfnoc_tdata (m_chdr_tdata),
+    .m_axis_rfnoc_tlast (m_chdr_tlast),
+    .m_axis_rfnoc_tvalid(m_chdr_tvalid),
+    .m_axis_rfnoc_tready(m_chdr_tready),
+    .ctrlport_req_wr    (/* unused */),
+    .ctrlport_req_rd    (/* unused */),
+    .ctrlport_req_addr  (/* unused */),
+    .ctrlport_req_data  (/* unused */),
+    .ctrlport_resp_ack  (/* unused */ 1'b0),
+    .ctrlport_resp_data (/* unused */ 32'd0)
+  );
+
+endmodule // liberio_chdr64_adapter