diff options
author | Ashish Chaudhari <ashish@ettus.com> | 2014-09-24 18:45:31 -0700 |
---|---|---|
committer | Ashish Chaudhari <ashish@ettus.com> | 2014-09-24 18:45:31 -0700 |
commit | 64d71dcbc5fa6790385b288de25224d386b047b0 (patch) | |
tree | 05d1048d44f5347f39b4036163a758e0a75d1ea3 /fpga/usrp3/top/x300/coregen_dsp | |
parent | ecdd34c08b79117c4f739b336daeb4b9d2bc8df3 (diff) | |
download | uhd-64d71dcbc5fa6790385b288de25224d386b047b0.tar.gz uhd-64d71dcbc5fa6790385b288de25224d386b047b0.tar.bz2 uhd-64d71dcbc5fa6790385b288de25224d386b047b0.zip |
fpga: Multiple X300 FPGA bugfixes and enhancements
- Fixed 10GigE firmware communication issues and sequence errors for TX
- Multiple changes to help ease timing closure
- Cleaned up build scripts
- Switched to Xilinx ISE 14.7 as the default build tool for X300
Diffstat (limited to 'fpga/usrp3/top/x300/coregen_dsp')
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/.gitignore | 2 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbdec1.ncf | 0 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbdec1.xise | 2 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbdec2.ncf | 0 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbdec2.xise | 2 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbdec3.ncf | 0 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbdec3.xise | 2 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbint1.ncf | 0 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbint1.xise | 2 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbint2.ncf | 0 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbint2.xise | 2 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbint3.ncf | 0 | ||||
-rw-r--r-- | fpga/usrp3/top/x300/coregen_dsp/hbint3.xise | 2 |
13 files changed, 7 insertions, 7 deletions
diff --git a/fpga/usrp3/top/x300/coregen_dsp/.gitignore b/fpga/usrp3/top/x300/coregen_dsp/.gitignore index f497e08fb..dbc4e5588 100644 --- a/fpga/usrp3/top/x300/coregen_dsp/.gitignore +++ b/fpga/usrp3/top/x300/coregen_dsp/.gitignore @@ -1,4 +1,4 @@ _xmsgs *.log - +*.ncf diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec1.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbdec1.ncf deleted file mode 100644 index e69de29bb..000000000 --- a/fpga/usrp3/top/x300/coregen_dsp/hbdec1.ncf +++ /dev/null diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec1.xise b/fpga/usrp3/top/x300/coregen_dsp/hbdec1.xise index 61795798c..78285c865 100644 --- a/fpga/usrp3/top/x300/coregen_dsp/hbdec1.xise +++ b/fpga/usrp3/top/x300/coregen_dsp/hbdec1.xise @@ -12,7 +12,7 @@ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. --> </header> - <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/> + <version xil_pn:ise_version="14.7" xil_pn:schema_version="2"/> <files> <file xil_pn:name="hbdec1.ngc" xil_pn:type="FILE_NGC"> diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec2.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbdec2.ncf deleted file mode 100644 index e69de29bb..000000000 --- a/fpga/usrp3/top/x300/coregen_dsp/hbdec2.ncf +++ /dev/null diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec2.xise b/fpga/usrp3/top/x300/coregen_dsp/hbdec2.xise index af99fb5fb..802546e7a 100644 --- a/fpga/usrp3/top/x300/coregen_dsp/hbdec2.xise +++ b/fpga/usrp3/top/x300/coregen_dsp/hbdec2.xise @@ -12,7 +12,7 @@ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. --> </header> - <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/> + <version xil_pn:ise_version="14.7" xil_pn:schema_version="2"/> <files> <file xil_pn:name="hbdec2.ngc" xil_pn:type="FILE_NGC"> diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec3.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbdec3.ncf deleted file mode 100644 index e69de29bb..000000000 --- a/fpga/usrp3/top/x300/coregen_dsp/hbdec3.ncf +++ /dev/null diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbdec3.xise b/fpga/usrp3/top/x300/coregen_dsp/hbdec3.xise index 1af65c49d..51594434a 100644 --- a/fpga/usrp3/top/x300/coregen_dsp/hbdec3.xise +++ b/fpga/usrp3/top/x300/coregen_dsp/hbdec3.xise @@ -12,7 +12,7 @@ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. --> </header> - <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/> + <version xil_pn:ise_version="14.7" xil_pn:schema_version="2"/> <files> <file xil_pn:name="hbdec3.ngc" xil_pn:type="FILE_NGC"> diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint1.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbint1.ncf deleted file mode 100644 index e69de29bb..000000000 --- a/fpga/usrp3/top/x300/coregen_dsp/hbint1.ncf +++ /dev/null diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint1.xise b/fpga/usrp3/top/x300/coregen_dsp/hbint1.xise index ddfc071f2..10aaec131 100644 --- a/fpga/usrp3/top/x300/coregen_dsp/hbint1.xise +++ b/fpga/usrp3/top/x300/coregen_dsp/hbint1.xise @@ -12,7 +12,7 @@ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. --> </header> - <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/> + <version xil_pn:ise_version="14.7" xil_pn:schema_version="2"/> <files> <file xil_pn:name="hbint1.ngc" xil_pn:type="FILE_NGC"> diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint2.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbint2.ncf deleted file mode 100644 index e69de29bb..000000000 --- a/fpga/usrp3/top/x300/coregen_dsp/hbint2.ncf +++ /dev/null diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint2.xise b/fpga/usrp3/top/x300/coregen_dsp/hbint2.xise index 471c12463..173aa9e79 100644 --- a/fpga/usrp3/top/x300/coregen_dsp/hbint2.xise +++ b/fpga/usrp3/top/x300/coregen_dsp/hbint2.xise @@ -12,7 +12,7 @@ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. --> </header> - <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/> + <version xil_pn:ise_version="14.7" xil_pn:schema_version="2"/> <files> <file xil_pn:name="hbint2.ngc" xil_pn:type="FILE_NGC"> diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint3.ncf b/fpga/usrp3/top/x300/coregen_dsp/hbint3.ncf deleted file mode 100644 index e69de29bb..000000000 --- a/fpga/usrp3/top/x300/coregen_dsp/hbint3.ncf +++ /dev/null diff --git a/fpga/usrp3/top/x300/coregen_dsp/hbint3.xise b/fpga/usrp3/top/x300/coregen_dsp/hbint3.xise index a608666d2..8ea2b2c80 100644 --- a/fpga/usrp3/top/x300/coregen_dsp/hbint3.xise +++ b/fpga/usrp3/top/x300/coregen_dsp/hbint3.xise @@ -12,7 +12,7 @@ <!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. --> </header> - <version xil_pn:ise_version="14.6" xil_pn:schema_version="2"/> + <version xil_pn:ise_version="14.7" xil_pn:schema_version="2"/> <files> <file xil_pn:name="hbint3.ngc" xil_pn:type="FILE_NGC"> |