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| author | Martin Braun <martin.braun@ettus.com> | 2014-09-24 17:51:10 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2014-09-24 17:51:10 -0700 |
| commit | ecdd34c08b79117c4f739b336daeb4b9d2bc8df3 (patch) | |
| tree | ccf5b8cd34b2b0d333e3880dedfb23b72d3e0cbf /fpga/usrp3/top/x300/coregen_chipscope | |
| parent | fa0313652cc25e17e6c3151f67111fb88c62778e (diff) | |
| download | uhd-ecdd34c08b79117c4f739b336daeb4b9d2bc8df3.tar.gz uhd-ecdd34c08b79117c4f739b336daeb4b9d2bc8df3.tar.bz2 uhd-ecdd34c08b79117c4f739b336daeb4b9d2bc8df3.zip | |
x300: Added output sync for DAC reference clocks
Diffstat (limited to 'fpga/usrp3/top/x300/coregen_chipscope')
0 files changed, 0 insertions, 0 deletions